Package arm-step: ARM step evaluator
Information
| name | arm-step |
| version | 1.1 |
| description | ARM step evaluator |
| author | HOL OpenTheory Packager <opentheory-packager@hol-theorem-prover.org> |
| license | MIT |
| checksum | 8650d7950f444164c4a5b0fce1a063db43391af0 |
| requires | base hol-base hol-words hol-string hol-integer hol-monad hol-floating-point arm-model |
| show | Data.Bool Data.List Data.Option Data.Pair Data.Unit Function HOL4 Number.Natural |
Files
- Package tarball arm-step-1.1.tgz
- Theory source file arm-step.thy (included in the package tarball)
Defined Constants
- HOL4
- arm_step
- arm_step.reverse_endian
- arm_step.DecodeRoundingMode
- arm_step.GoodMode
- arm_step.LDM1
- arm_step.LDM_UPTO
- arm_step.NextStateARM
- arm_step.R_mode
- arm_step.STM1
- arm_step.STM_UPTO
- arm_step.SingleOfDouble
- arm_step.UpdateSingleOfDouble
- arm_step
Theorems
{arm_step.GoodMode mode} ⊦ arm.BadMode mode s ⇔ ⊥
{¬arm.arm_state_Extensions s arm.Extension_Security}
⊦ arm.IsSecure () s ⇔ ⊤
{¬(d = words.n2w 15)} ⊦ ¬(arm_step.R_mode mode d = arm.RName_PC)
⊦ ∀w. arm.BitCount w = words.bit_count w
⊦ ∀w. arm_step.reverse_endian (arm_step.reverse_endian w) = w
{arm_step.GoodMode (arm.PSR_M (arm.arm_state_CPSR s))}
⊦ arm.CurrentModeIsHyp () s = (⊥, s)
⊦ ∀x. fst (pair.SWAP x) = snd x
{alignment.aligned p v} ⊦ (if b then alignment.align p v else v) = v
{arm_step.GoodMode mode}
⊦ ¬(mode =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 1))))
{arm_step.GoodMode mode}
⊦ ¬(mode =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))))
{alignment.aligned (arithmetic.BIT2 0) pc}
⊦ ¬words.word_bit 0 (words.word_add pc (words.n2w (arithmetic.BIT2 1)))
⊦ ∀s.
arm.RoundingMode s =
arm_step.DecodeRoundingMode
(arm.FPSCR_RMode (arm.FP_FPSCR (arm.arm_state_FP s)))
{alignment.aligned (arithmetic.BIT2 0) pc}
⊦ ¬words.word_bit 0 (words.word_add pc (words.n2w (arithmetic.BIT2 3)))
{alignment.aligned (arithmetic.BIT2 0) pc}
⊦ ¬words.word_bit 1 (words.word_add pc (words.n2w (arithmetic.BIT2 1)))
⊦ (if ¬b then c else d) = if b then d else c
{alignment.aligned (arithmetic.BIT2 0) pc}
⊦ ¬words.word_bit 1 (words.word_add pc (words.n2w (arithmetic.BIT2 3)))
{arm.PSR_IT (arm.arm_state_CPSR s) = words.n2w 0}
⊦ arm.arm_state_CPSR_fupd
(const (arm.PSR_IT_fupd (const (words.n2w 0)) (arm.arm_state_CPSR s)))
s = s
⊦ ∀w. words.bit_count w < 1 ⇔ w = words.n2w 0
⊦ ∀w1 w2.
bitstring.w2v w1 @ bitstring.w2v w2 =
bitstring.w2v (words.word_concat w1 w2)
⊦ ∀f s. state_transformer.FOR (n, n, f) s = f n s
⊦ (if x then a else if y then a else b) = if x ∨ y then a else b
⊦ ∀r1 r2 m. arm_step.R_mode m r1 = arm_step.R_mode m r2 ⇔ r1 = r2
⊦ ∀s0.
arm_step.NextStateARM s0 =
bool.LET
(λs1.
if arm.arm_state_exception s1 = arm.NoException then some s1
else none) (arm.Next s0)
{alignment.aligned (arithmetic.BIT2 0) x}
⊦ alignment.aligned (arithmetic.BIT2 0)
(if a then words.word_add x y else words.word_sub x y) ⇔
alignment.aligned (arithmetic.BIT2 0) y
⊦ ∀mode x. arm_step.R_mode mode x = arm.RName_PC ⇔ x = words.n2w 15
⊦ ∀x y carry_in.
arm.AddWithCarry (x, y, carry_in) =
words.add_with_carry (x, y, carry_in)
⊦ ∀b s1 s2.
(if b then ((), s1) else ((), s2)) = ((), (if b then s1 else s2))
⊦ ∀w1 w2 w3.
bitstring.w2v w1 @ bitstring.w2v w2 @ bitstring.w2v w3 =
bitstring.w2v (words.word_concat w1 (words.word_concat w2 w3))
{alignment.aligned 1 w}
⊦ alignment.align 1
(words.word_add (words.word_add w (words.n2w (arithmetic.BIT2 1))) v) =
words.word_add (words.word_add w (alignment.align 1 v))
(words.n2w (arithmetic.BIT2 1))
{alignment.aligned (arithmetic.BIT2 0) pc}
⊦ alignment.aligned (arithmetic.BIT2 0)
(words.word_add
(words.word_add pc
(if b then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) imm32) ⇔
alignment.aligned (arithmetic.BIT2 0) imm32
{alignment.aligned 1 pc}
⊦ alignment.aligned 1
(words.word_add
(words.word_add pc
(if b then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) imm32) ⇔
alignment.aligned 1 imm32
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ alignment.aligned 1
(words.word_add
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) x) ⇔ alignment.aligned 1 x
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ alignment.aligned 1
(words.word_sub
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) x) ⇔ alignment.aligned 1 x
⊦ ∀w.
arm.CountLeadingZeroBits w =
if w = words.n2w 0 then arithmetic.BIT2 7
else arithmetic.- 15 (words.w2n (words.word_log2 w))
{alignment.aligned (arithmetic.BIT2 0) w}
⊦ alignment.align 1
(words.word_add (words.word_add w (words.n2w (arithmetic.BIT2 3))) v) =
words.word_add (words.word_add w (alignment.align 1 v))
(words.n2w (arithmetic.BIT2 3))
⊦ ∀m.
arm_step.DecodeRoundingMode m =
if m = words.n2w 0 then binary_ieee.roundTiesToEven
else if m = words.n2w 1 then binary_ieee.roundTowardPositive
else if m = words.n2w (arithmetic.BIT2 0) then
binary_ieee.roundTowardNegative
else binary_ieee.roundTowardZero
⊦ ∀w.
arm.CountLeadingZeroBits w =
if w = words.n2w 0 then arithmetic.BIT2 15
else arithmetic.- 31 (words.w2n (words.word_log2 w))
⊦ ∀b r s m.
list.FOLDL (arm_step.LDM1 (arm_step.R_mode m) b r s)
(arm.arm_state_REG s) (rich_list.COUNT_LIST 15) arm.RName_PC =
arm.arm_state_REG s arm.RName_PC
{alignment.aligned 1 w}
⊦ words.word_concat
(words.word_extract 31 1
(words.word_add w (words.n2w (arithmetic.BIT2 1)))) (words.n2w 1) =
words.word_add w (words.n2w (bit1 (arithmetic.BIT2 0)))
⊦ ¬(b3 ∧ b2 ∧ b1 ∧ b0) ⇔
¬(bitstring.v2w (b3 :: b2 :: b1 :: b0 :: []) = words.n2w 15)
{alignment.aligned (arithmetic.BIT2 0) w}
⊦ alignment.align (arithmetic.BIT2 0)
(words.word_add
(alignment.align (arithmetic.BIT2 0)
(words.word_add w (words.n2w (arithmetic.BIT2 3)))) v) =
words.word_add (words.word_add w (alignment.align (arithmetic.BIT2 0) v))
(words.n2w (arithmetic.BIT2 3))
⊦ ∀r.
words.word_sub (words.n2w (words.bit_count_upto 15 r))
(words.n2w (words.bit_count r)) =
if words.word_bit 15 r then words.word_2comp (words.n2w 1)
else words.n2w 0
⊦ words.word_div (bitstring.v2w (b4 :: b3 :: b2 :: b1 :: b0 :: []))
(words.n2w (arithmetic.BIT2 0)) =
bitstring.v2w (⊥ :: b4 :: b3 :: b2 :: b1 :: [])
⊦ (∀w.
words.word_extract 1 0 w = words.n2w 0 ⇔
alignment.aligned (arithmetic.BIT2 0) w) ∧
∀w.
words.word_extract (arithmetic.BIT2 0) 0 w = words.n2w 0 ⇔
alignment.aligned 3 w
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ alignment.aligned (arithmetic.BIT2 0)
(words.word_add
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) x) ⇔
if t then alignment.aligned (arithmetic.BIT2 0) (words.word_add pc x)
else alignment.aligned (arithmetic.BIT2 0) x
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ alignment.aligned (arithmetic.BIT2 0)
(words.word_sub
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3))) x) ⇔
if t then alignment.aligned (arithmetic.BIT2 0) (words.word_sub pc x)
else alignment.aligned (arithmetic.BIT2 0) x
⊦ ∀w1 w2 w3 w4 w5.
bitstring.w2v w1 @ bitstring.w2v w2 @ bitstring.w2v w3 @
bitstring.w2v w4 @ bitstring.w2v w5 =
bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3 (words.word_concat w4 w5))))
⊦ ∀b w.
arm_step.SingleOfDouble b w =
if b then words.word_extract 63 (arithmetic.BIT2 15) w
else words.word_extract 31 0 w
⊦ ∀w1 w2.
bitstring.field 7 0 (bitstring.w2v (words.word_concat w1 w2)) @
bitstring.field 15 (arithmetic.BIT2 3)
(bitstring.w2v (words.word_concat w1 w2)) =
bitstring.w2v (words.word_concat w2 w1)
{¬arm.PSR_J (arm.arm_state_CPSR s)}
⊦ (arm.CurrentInstrSet () s = arm.InstrSet_ARM ⇔
¬arm.PSR_T (arm.arm_state_CPSR s)) ∧
(arm.CurrentInstrSet () s = arm.InstrSet_Thumb ⇔
arm.PSR_T (arm.arm_state_CPSR s)) ∧
¬(arm.CurrentInstrSet () s = arm.InstrSet_Jazelle) ∧
¬(arm.CurrentInstrSet () s = arm.InstrSet_ThumbEE)
⊦ ∀p a b c d.
alignment.aligned (arithmetic.BIT2 0)
(if p then
words.word_concat a (words.word_concat b (words.word_concat c d))
else
words.word_concat d
(words.word_concat c (words.word_concat b a))) ⇔
alignment.aligned (arithmetic.BIT2 0) (if p then d else a)
⊦ ∀i j f s.
i ≤ j ⇒
state_transformer.FOR (i, j, f) s =
((),
list.FOLDL (λx n. snd (f (n + i) x)) s
(rich_list.COUNT_LIST (arithmetic.- j i + 1)))
⊦ ∀b v w.
arm_step.UpdateSingleOfDouble b v w =
if b then words.bit_field_insert 63 (arithmetic.BIT2 15) v w
else words.bit_field_insert 31 0 v w
⊦ ∀imm2 w C s.
arm.Shift_C (w, arm.SRType_LSL, imm2, C) s =
((words.word_lsl w imm2,
(if imm2 = 0 then C
else
fcp.fcp_index (words.word_lsl (words.w2w w) imm2)
(arithmetic.BIT2 15))), s)
⊦ ∀l f b r s c w u reg.
list.FOLDL
(arm_step.LDM1 f b r
(arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const w)
(arm.arm_state_undefined_fupd (const u) s)))) reg l =
list.FOLDL (arm_step.LDM1 f b r s) reg l
⊦ ∀l f b r s c w u mem.
list.FOLDL
(arm_step.STM1 f b r
(arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const w)
(arm.arm_state_undefined_fupd (const u) s)))) mem l =
list.FOLDL (arm_step.STM1 f b r s) mem l
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ words.word_add
(alignment.align (arithmetic.BIT2 0)
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3)))) x =
if t then
words.word_add (alignment.align (arithmetic.BIT2 0) pc)
(words.word_add x (words.n2w (arithmetic.BIT2 1)))
else words.word_add pc (words.word_add x (words.n2w (arithmetic.BIT2 3)))
{alignment.aligned (if t then 1 else arithmetic.BIT2 0) pc}
⊦ words.word_sub
(alignment.align (arithmetic.BIT2 0)
(words.word_add pc
(if t then words.n2w (arithmetic.BIT2 1)
else words.n2w (arithmetic.BIT2 3)))) x =
if t then
words.word_sub (alignment.align (arithmetic.BIT2 0) pc)
(words.word_sub x (words.n2w (arithmetic.BIT2 1)))
else words.word_sub pc (words.word_sub x (words.n2w (arithmetic.BIT2 3)))
⊦ ∀x fpscr.
arm.rec'FPSCR
(words.bit_field_insert 31
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))) x
(arm.reg'FPSCR fpscr)) =
arm.FPSCR_N_fupd (const (fcp.fcp_index x 3))
(arm.FPSCR_Z_fupd (const (fcp.fcp_index x (arithmetic.BIT2 0)))
(arm.FPSCR_C_fupd (const (fcp.fcp_index x 1))
(arm.FPSCR_V_fupd (const (fcp.fcp_index x 0)) fpscr)))
⊦ ∀f i registers b s.
arm_step.LDM_UPTO f i registers (b, s) =
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (i + 1) registers))),
arm.arm_state_REG_fupd
(const
(list.FOLDL (arm_step.LDM1 f b registers s) (arm.arm_state_REG s)
(rich_list.COUNT_LIST (i + 1)))) s)
⊦ ∀f i registers b s.
arm_step.STM_UPTO f i registers (b, s) =
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (i + 1) registers))),
arm.arm_state_MEM_fupd
(const
(list.FOLDL (arm_step.STM1 f b registers s) (arm.arm_state_MEM s)
(rich_list.COUNT_LIST (i + 1)))) s)
⊦ ∀l r f g a b.
length l = length r ∧ a = b ∧
(∀i x. i < length l ⇒ f x (list.EL i l) = g x (list.EL i r)) ⇒
list.FOLDL f a l = list.FOLDL g b r
⊦ ∀w.
words.word_concat
(words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) w)
(words.word_concat
(words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) w)
(words.word_concat (words.word_extract 15 (arithmetic.BIT2 3) w)
(words.word_extract 7 0 w))) = w
⊦ ∀w.
arm_step.reverse_endian w =
words.word_concat (words.word_extract 7 0 w)
(words.word_concat (words.word_extract 15 (arithmetic.BIT2 3) w)
(words.word_concat
(words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) w)
(words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) w)))
⊦ ∀m.
arm_step.GoodMode m ⇔
bool.IN m
(pred_set.INSERT (words.n2w (arithmetic.BIT2 7))
(pred_set.INSERT (words.n2w (bit1 (arithmetic.BIT2 3)))
(pred_set.INSERT
(words.n2w (arithmetic.BIT2 (arithmetic.BIT2 3)))
(pred_set.INSERT
(words.n2w (bit1 (bit1 (arithmetic.BIT2 1))))
(pred_set.INSERT
(words.n2w (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))
(pred_set.INSERT
(words.n2w
(bit1
(bit1
(arithmetic.BIT2 (arithmetic.BIT2 0)))))
(pred_set.INSERT (words.n2w 31)
pred_set.EMPTY)))))))
⊦ (∀i.
(if words.word_bit 0 i then
words.word_concat (words.word_extract 31 1 i) (words.n2w 0)
else i) = alignment.align 1 i) ∧
(∀i.
words.word_concat (words.word_extract 31 1 i) (words.n2w 0) =
alignment.align 1 i) ∧
∀i.
words.word_concat (words.word_extract 31 (arithmetic.BIT2 0) i)
(words.n2w 0) = alignment.align (arithmetic.BIT2 0) i
⊦ (∀w. arm.Aligned (w, 1) ⇔ alignment.aligned 0 w) ∧
(∀w. arm.Aligned (w, arithmetic.BIT2 0) ⇔ alignment.aligned 1 w) ∧
(∀w.
arm.Aligned (w, arithmetic.BIT2 1) ⇔
alignment.aligned (arithmetic.BIT2 0) w) ∧
(∀w. arm.Aligned (w, arithmetic.BIT2 3) ⇔ alignment.aligned 3 w) ∧
∀w.
arm.Aligned (w, arithmetic.BIT2 7) ⇔
alignment.aligned (arithmetic.BIT2 1) w
⊦ (∀w. arm.Align (w, 1) = alignment.align 0 w) ∧
(∀w. arm.Align (w, arithmetic.BIT2 0) = alignment.align 1 w) ∧
(∀w.
arm.Align (w, arithmetic.BIT2 1) =
alignment.align (arithmetic.BIT2 0) w) ∧
(∀w. arm.Align (w, arithmetic.BIT2 3) = alignment.align 3 w) ∧
∀w.
arm.Align (w, arithmetic.BIT2 7) =
alignment.align (arithmetic.BIT2 1) w
⊦ (∀w x.
alignment.aligned (arithmetic.BIT2 0)
(words.word_add (alignment.align (arithmetic.BIT2 0) w) x) ⇔
alignment.aligned (arithmetic.BIT2 0) x) ∧
(∀w x.
alignment.aligned (arithmetic.BIT2 0)
(words.word_sub (alignment.align (arithmetic.BIT2 0) w) x) ⇔
alignment.aligned (arithmetic.BIT2 0) x) ∧
(∀w x.
alignment.aligned 1
(words.word_add (alignment.align (arithmetic.BIT2 0) w) x) ⇔
alignment.aligned 1 x) ∧
∀w x.
alignment.aligned 1
(words.word_sub (alignment.align (arithmetic.BIT2 0) w) x) ⇔
alignment.aligned 1 x
{arm.arm_state_exception s = arm.NoException}
⊦ arm.Fetch s =
(arm.ARM (bitstring.v2w v),
arm.arm_state_Encoding_fupd (const arm.Encoding_ARM) s) ∧
arm.DecodeARM (bitstring.v2w v)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM) s) =
(ast,
arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM)
(arm.arm_state_undefined_fupd (const ⊥) s))) ∧
(∀s. arm.Run ast s = f s) ∧
f
(arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM)
(arm.arm_state_undefined_fupd (const ⊥) s))) = s1 ∧
arm.arm_state_Encoding s1 = arm.Encoding_ARM ∧
arm.arm_state_exception s1 = arm.arm_state_exception s ⇒
arm_step.NextStateARM s = some s1
{arm.arm_state_exception s = arm.NoException}
⊦ arm.Fetch s =
(arm.ARM (bitstring.v2w v),
arm.arm_state_Encoding_fupd (const arm.Encoding_ARM) s) ∧
arm.DecodeARM (bitstring.v2w v)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM) s) =
(ast,
arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM)
(arm.arm_state_undefined_fupd (const ⊥) s))) ∧
(∀s. arm.Run ast s = f x s) ∧
f x
(arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_ARM)
(arm.arm_state_undefined_fupd (const ⊥) s))) = s1 ∧
arm.arm_state_Encoding s1 = arm.Encoding_ARM ∧
arm.arm_state_exception s1 = arm.arm_state_exception s ⇒
arm_step.NextStateARM s = some s1
{arm.arm_state_exception s = arm.NoException}
⊦ arm.Fetch s =
(arm.Thumb (bitstring.v2w v),
arm.arm_state_Encoding_fupd (const arm.Encoding_Thumb) s) ∧
arm.DecodeThumb (bitstring.v2w v)
(arm.arm_state_Encoding_fupd (const arm.Encoding_Thumb) s) =
(ast,
arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_Thumb)
(arm.arm_state_undefined_fupd (const ⊥) s))) ∧
(∀s. arm.Run ast s = f x s) ∧
f x
(arm.arm_state_CurrentCondition_fupd (const c)
(arm.arm_state_Encoding_fupd (const arm.Encoding_Thumb)
(arm.arm_state_undefined_fupd (const ⊥) s))) = s1 ∧
arm.ITAdvance () s1 = s2 ∧
arm.arm_state_exception s2 = arm.arm_state_exception s ⇒
arm_step.NextStateARM s = some s2
⊦ ∀w1 w2 w3 w4.
bitstring.field 7 0
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2 (words.word_concat w3 w4)))) @
bitstring.field 15 (arithmetic.BIT2 3)
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2 (words.word_concat w3 w4)))) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2 (words.word_concat w3 w4)))) @
bitstring.field 31 (arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2 (words.word_concat w3 w4)))) =
bitstring.w2v
(words.word_concat w4
(words.word_concat w3 (words.word_concat w2 w1)))
⊦ (if words.word_bit 0 registers then
(words.word_add b (words.n2w (arithmetic.BIT2 1)),
arm.arm_state_REG_fupd
(const
(combin.UPDATE (f (words.n2w 0))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_concat (arm.arm_state_MEM s b)
(words.word_concat
(arm.arm_state_MEM s
(words.word_add b (words.n2w 1)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add b
(words.n2w (arithmetic.BIT2 0))))
(arm.arm_state_MEM s
(words.word_add b (words.n2w 3)))))
else
words.word_concat
(arm.arm_state_MEM s (words.word_add b (words.n2w 3)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add b
(words.n2w (arithmetic.BIT2 0))))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add b (words.n2w 1)))
(arm.arm_state_MEM s b)))) (arm.arm_state_REG s)))
s)
else (b, s)) = arm_step.LDM_UPTO f 0 registers (b, s)
⊦ (∀s r i f b.
fst (arm_step.STM_UPTO f i r (b, s)) =
words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (i + 1) r)))) ∧
(∀s r i f b.
arm.arm_state_REG (snd (arm_step.STM_UPTO f i r (b, s))) =
arm.arm_state_REG s) ∧
(∀s r i f b.
arm.arm_state_CPSR (snd (arm_step.STM_UPTO f i r (b, s))) =
arm.arm_state_CPSR s) ∧
∀s r i f b.
arm.arm_state_Extensions (snd (arm_step.STM_UPTO f i r (b, s))) =
arm.arm_state_Extensions s
⊦ (∀m. arm_step.R_mode m (words.n2w 0) = arm.RName_0usr) ∧
(∀m. arm_step.R_mode m (words.n2w 1) = arm.RName_1usr) ∧
(∀m.
arm_step.R_mode m (words.n2w (arithmetic.BIT2 0)) = arm.RName_2usr) ∧
(∀m. arm_step.R_mode m (words.n2w 3) = arm.RName_3usr) ∧
(∀m.
arm_step.R_mode m (words.n2w (arithmetic.BIT2 1)) = arm.RName_4usr) ∧
(∀m.
arm_step.R_mode m (words.n2w (bit1 (arithmetic.BIT2 0))) =
arm.RName_5usr) ∧
(∀m.
arm_step.R_mode m (words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0))) =
arm.RName_6usr) ∧
(∀m. arm_step.R_mode m (words.n2w 7) = arm.RName_7usr) ∧
∀m. arm_step.R_mode m (words.n2w 15) = arm.RName_PC
⊦ ∀w.
words.word_extract 7 0 (arm_step.reverse_endian w) =
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) w ∧
words.word_extract 15 (arithmetic.BIT2 3) (arm_step.reverse_endian w) =
words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) w ∧
words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (arm_step.reverse_endian w) =
words.word_extract 15 (arithmetic.BIT2 3) w ∧
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(arm_step.reverse_endian w) = words.word_extract 7 0 w
⊦ ∀f b registers s r j.
arm_step.LDM1 f b registers s r j =
(if words.word_bit j registers then
combin.UPDATE (f (words.n2w j))
(bool.LET
(λa.
if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_concat (arm.arm_state_MEM s a)
(words.word_concat
(arm.arm_state_MEM s
(words.word_add a (words.n2w 1)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add a
(words.n2w (arithmetic.BIT2 0))))
(arm.arm_state_MEM s
(words.word_add a (words.n2w 3)))))
else
words.word_concat
(arm.arm_state_MEM s (words.word_add a (words.n2w 3)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add a
(words.n2w (arithmetic.BIT2 0))))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add a (words.n2w 1)))
(arm.arm_state_MEM s a))))
(words.word_add b
(if j = 0 then words.n2w 0
else
words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto j registers)))))
else id) r
⊦ (∀s r i f b.
fst (arm_step.LDM_UPTO f i r (b, s)) =
words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (i + 1) r)))) ∧
(∀s r i f b.
arm.arm_state_MEM (snd (arm_step.LDM_UPTO f i r (b, s))) =
arm.arm_state_MEM s) ∧
(∀s r i f b.
arm.arm_state_CPSR (snd (arm_step.LDM_UPTO f i r (b, s))) =
arm.arm_state_CPSR s) ∧
(∀s r i f b.
arm.arm_state_Architecture (snd (arm_step.LDM_UPTO f i r (b, s))) =
arm.arm_state_Architecture s) ∧
∀s r i f b.
arm.arm_state_Extensions (snd (arm_step.LDM_UPTO f i r (b, s))) =
arm.arm_state_Extensions s
⊦ n = words.n2w 0 ∨ n = words.n2w 1 ∨ n = words.n2w (arithmetic.BIT2 0) ∨
n = words.n2w 3 ∨ n = words.n2w (arithmetic.BIT2 1) ∨
n = words.n2w (bit1 (arithmetic.BIT2 0)) ∨
n = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) ∨ n = words.n2w 7 ∨
n = words.n2w (arithmetic.BIT2 3) ∨
n = words.n2w (bit1 (arithmetic.BIT2 1)) ∨
n = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1)) ∨
n = words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) ∨
n = words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) ∨
n = words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∨
n = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0))) ⇔
¬(n = words.n2w 15)
⊦ ∀b a amount w C s.
arm.Shift_C
(w, arm.DecodeRegShift (bitstring.v2w (a :: b :: [])), amount, C) s =
((if ¬a ∧ ¬b then
(words.word_lsl w amount,
(if amount = 0 then C
else
fcp.fcp_index (words.word_lsl (words.w2w w) amount)
(arithmetic.BIT2 15)))
else if ¬a ∧ b then
(words.word_lsr w amount,
(if amount = 0 then C
else
amount ≤ arithmetic.BIT2 15 ∧
words.word_bit (arithmetic.- amount 1) w))
else if a ∧ ¬b then
(words.word_asr w amount,
(if amount = 0 then C
else
words.word_bit
(arithmetic.- (min (arithmetic.BIT2 15) amount) 1) w))
else
(words.word_ror w amount,
(if amount = 0 then C
else words.word_msb (words.word_ror w amount)))), s)
⊦ (∀s.
arm.ArchVersion () s < arithmetic.BIT2 (arithmetic.BIT2 0) ⇔
arm.arm_state_Architecture s = arm.ARMv4 ∨
arm.arm_state_Architecture s = arm.ARMv4T ∨
arm.arm_state_Architecture s = arm.ARMv5T ∨
arm.arm_state_Architecture s = arm.ARMv5TE) ∧
(∀s.
arm.ArchVersion () s ≥ bit1 (arithmetic.BIT2 0) ⇔
¬(arm.arm_state_Architecture s = arm.ARMv4) ∧
¬(arm.arm_state_Architecture s = arm.ARMv4T)) ∧
(∀s.
arm.ArchVersion () s = arithmetic.BIT2 1 ⇔
arm.arm_state_Architecture s = arm.ARMv4 ∨
arm.arm_state_Architecture s = arm.ARMv4T) ∧
(∀s.
arm.ArchVersion () s ≥ arithmetic.BIT2 (arithmetic.BIT2 0) ⇔
arm.arm_state_Architecture s = arm.ARMv6 ∨
arm.arm_state_Architecture s = arm.ARMv6K ∨
arm.arm_state_Architecture s = arm.ARMv6T2 ∨
arm.arm_state_Architecture s = arm.ARMv7_A ∨
arm.arm_state_Architecture s = arm.ARMv7_R) ∧
∀s.
arm.ArchVersion () s ≥ 7 ⇔
arm.arm_state_Architecture s = arm.ARMv7_A ∨
arm.arm_state_Architecture s = arm.ARMv7_R
⊦ (∀w.
bitstring.v2w
(bitstring.field 15 (arithmetic.BIT2 3)
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w))) =
words.word_extract 7 0 w) ∧
(∀w.
bitstring.v2w
(bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w)) =
words.word_extract 15 (arithmetic.BIT2 3) w) ∧
(∀w.
bitstring.v2w
(bitstring.field 7 0
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w))) =
words.word_extract 15 (arithmetic.BIT2 3) w) ∧
∀w.
bitstring.v2w (bitstring.field 7 0 (bitstring.w2v w)) =
words.word_extract 7 0 w
⊦ words.word_extract 31 0
(bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 ::
b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 ::
b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 ::
b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 :: b22 ::
b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 :: b13 :: b12 ::
b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 ::
b0 :: [])
⊦ (bitstring.v2w (⊥ :: b2 :: b1 :: b0 :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ⇔ ⊥) ∧
(bitstring.v2w (b2 :: ⊥ :: b1 :: b0 :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ⇔ ⊥) ∧
(bitstring.v2w (b2 :: b1 :: ⊤ :: b0 :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ⇔ ⊥) ∧
(bitstring.v2w (b2 :: b1 :: b0 :: ⊥ :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ⇔ ⊥) ∧
(bitstring.v2w (⊥ :: b2 :: b1 :: b0 :: []) = words.n2w 15 ⇔ ⊥) ∧
(bitstring.v2w (b2 :: ⊥ :: b1 :: b0 :: []) = words.n2w 15 ⇔ ⊥) ∧
(bitstring.v2w (b2 :: b1 :: ⊥ :: b0 :: []) = words.n2w 15 ⇔ ⊥) ∧
(bitstring.v2w (b2 :: b1 :: b0 :: ⊥ :: []) = words.n2w 15 ⇔ ⊥)
⊦ ∀x.
arm.reg'FPSCR x =
words.word_concat (bitstring.v2w (arm.FPSCR_N x :: []))
(words.word_concat (bitstring.v2w (arm.FPSCR_Z x :: []))
(words.word_concat (bitstring.v2w (arm.FPSCR_C x :: []))
(words.word_concat (bitstring.v2w (arm.FPSCR_V x :: []))
(words.word_concat (bitstring.v2w (arm.FPSCR_QC x :: []))
(words.word_concat
(bitstring.v2w (arm.FPSCR_AHP x :: []))
(words.word_concat
(bitstring.v2w (arm.FPSCR_DN x :: []))
(words.word_concat
(bitstring.v2w (arm.FPSCR_FZ x :: []))
(words.word_concat (arm.FPSCR_RMode x)
(words.word_concat
(words.word_extract
(bit1 (arithmetic.BIT2 0)) 0
(arm.FPSCR_fpscr'rst x))
(words.word_concat
(bitstring.v2w (arm.FPSCR_IDE x :: []))
(words.word_concat
(words.word_extract 7
(arithmetic.BIT2
(arithmetic.BIT2 0))
(arm.FPSCR_fpscr'rst x))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_IXE x :: []))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_UFE x :: []))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_OFE x :: []))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_DZE x ::
[]))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_IOE
x :: []))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_IDC
x :: []))
(words.word_concat
(words.word_extract
(bit1
(arithmetic.BIT2
1))
(arithmetic.BIT2
3)
(arm.FPSCR_fpscr'rst
x))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_IXC
x ::
[]))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_UFC
x ::
[]))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_OFC
x ::
[]))
(words.word_concat
(bitstring.v2w
(arm.FPSCR_DZC
x ::
[]))
(bitstring.v2w
(arm.FPSCR_IOC
x ::
[]))))))))))))))))))))))))
⊦ ∀b a imm5 w C s.
arm.Shift_C
(w, fst (arm.DecodeImmShift (bitstring.v2w (a :: b :: []), imm5)),
snd (arm.DecodeImmShift (bitstring.v2w (a :: b :: []), imm5)), C)
s =
((if ¬a ∧ ¬b then
if imm5 = words.n2w 0 then (w, C)
else
(words.word_lsl w (words.w2n imm5),
fcp.fcp_index (words.word_lsl (words.w2w w) (words.w2n imm5))
(arithmetic.BIT2 15))
else if ¬a ∧ b then
if imm5 = words.n2w 0 then (words.n2w 0, words.word_msb w)
else
(words.word_lsr w (words.w2n imm5),
words.w2n imm5 ≤ arithmetic.BIT2 15 ∧
words.word_bit (arithmetic.- (words.w2n imm5) 1) w)
else if a ∧ ¬b then
if imm5 = words.n2w 0 then
(words.word_asr w (arithmetic.BIT2 15), words.word_msb w)
else
(words.word_asr w (words.w2n imm5),
words.word_bit
(arithmetic.- (min (arithmetic.BIT2 15) (words.w2n imm5)) 1)
w)
else if imm5 = words.n2w 0 then pair.SWAP (words.word_rrx (C, w))
else
(words.word_ror w (words.w2n imm5),
words.word_msb (words.word_ror w (words.w2n imm5)))), s)
⊦ ∀f b registers s m j.
arm_step.STM1 f b registers s m j =
(if words.word_bit j registers then
bool.LET
(bool.LET
(λa r.
combin.UPDATE (words.word_add a (words.n2w 3))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 7 0 r
else
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
r) ∘
(combin.UPDATE
(words.word_add a (words.n2w (arithmetic.BIT2 0)))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 15 (arithmetic.BIT2 3) r
else
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) r) ∘
(combin.UPDATE (words.word_add a (words.n2w 1))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) r
else words.word_extract 15 (arithmetic.BIT2 3) r) ∘
combin.UPDATE a
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
r
else words.word_extract 7 0 r))))
(words.word_add b
(if j = 0 then words.n2w 0
else
words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto j registers)))))
(arm.arm_state_REG s (f (words.n2w j)))
else id) m
⊦ (if words.word_bit 0 registers then
(words.word_add b (words.n2w (arithmetic.BIT2 1)),
arm.arm_state_MEM_fupd
(const
(combin.UPDATE (words.word_add b (words.n2w 3))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 7 0
(arm.arm_state_REG s (f (words.n2w 0)))
else
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(arm.arm_state_REG s (f (words.n2w 0))))
(combin.UPDATE
(words.word_add b (words.n2w (arithmetic.BIT2 0)))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 15 (arithmetic.BIT2 3)
(arm.arm_state_REG s (f (words.n2w 0)))
else
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(arm.arm_state_REG s (f (words.n2w 0))))
(combin.UPDATE (words.word_add b (words.n2w 1))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(arm.arm_state_REG s (f (words.n2w 0)))
else
words.word_extract 15 (arithmetic.BIT2 3)
(arm.arm_state_REG s (f (words.n2w 0))))
(combin.UPDATE b
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 31
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 0))))
(arm.arm_state_REG s (f (words.n2w 0)))
else
words.word_extract 7 0
(arm.arm_state_REG s (f (words.n2w 0))))
(arm.arm_state_MEM s)))))) s)
else (b, s)) = arm_step.STM_UPTO f 0 registers (b, s)
⊦ words.word_add a
(alignment.align (arithmetic.BIT2 0)
(words.sw2sw
(words.word_concat
(bitstring.v2w
(x0 :: x1 :: x2 :: x3 :: x4 :: x5 :: x6 :: x7 :: x8 ::
x9 :: x10 :: x11 :: x12 :: x13 :: x14 :: x15 :: x16 ::
x17 :: x18 :: x19 :: x20 :: x21 :: x22 :: x23 :: []))
(words.n2w 0)))) =
if x0 then
words.word_sub a
(words.word_add
(bitstring.v2w
(¬x1 :: ¬x2 :: ¬x3 :: ¬x4 :: ¬x5 :: ¬x6 :: ¬x7 :: ¬x8 :: ¬x9 ::
¬x10 :: ¬x11 :: ¬x12 :: ¬x13 :: ¬x14 :: ¬x15 :: ¬x16 ::
¬x17 :: ¬x18 :: ¬x19 :: ¬x20 :: ¬x21 :: ¬x22 :: ¬x23 :: ⊤ ::
⊤ :: [])) (words.n2w 1))
else
words.word_add a
(bitstring.v2w
(x1 :: x2 :: x3 :: x4 :: x5 :: x6 :: x7 :: x8 :: x9 :: x10 ::
x11 :: x12 :: x13 :: x14 :: x15 :: x16 :: x17 :: x18 :: x19 ::
x20 :: x21 :: x22 :: x23 :: ⊥ :: ⊥ :: []))
⊦ words.word_add a
(alignment.align 1
(words.sw2sw
(words.word_concat
(bitstring.v2w
(x0 :: x1 :: x2 :: x3 :: x4 :: x5 :: x6 :: x7 :: x8 ::
x9 :: x10 :: x11 :: x12 :: x13 :: x14 :: x15 :: x16 ::
x17 :: x18 :: x19 :: x20 :: x21 :: x22 :: x23 :: []))
(bitstring.v2w (x24 :: ⊥ :: []))))) =
if x0 then
words.word_sub a
(words.word_add
(bitstring.v2w
(¬x1 :: ¬x2 :: ¬x3 :: ¬x4 :: ¬x5 :: ¬x6 :: ¬x7 :: ¬x8 :: ¬x9 ::
¬x10 :: ¬x11 :: ¬x12 :: ¬x13 :: ¬x14 :: ¬x15 :: ¬x16 ::
¬x17 :: ¬x18 :: ¬x19 :: ¬x20 :: ¬x21 :: ¬x22 :: ¬x23 ::
¬x24 :: ⊤ :: [])) (words.n2w 1))
else
words.word_add a
(bitstring.v2w
(x1 :: x2 :: x3 :: x4 :: x5 :: x6 :: x7 :: x8 :: x9 :: x10 ::
x11 :: x12 :: x13 :: x14 :: x15 :: x16 :: x17 :: x18 :: x19 ::
x20 :: x21 :: x22 :: x23 :: x24 :: ⊥ :: []))
⊦ arm.VFPExpandImm
(words.word_concat (bitstring.v2w (b7 :: b6 :: b5 :: b4 :: []))
(bitstring.v2w (b3 :: b2 :: b1 :: b0 :: [])), b) =
if b then
bitstring.v2w
(b7 :: ¬b6 :: b6 :: b6 :: b6 :: b6 :: b6 :: b5 :: b4 :: b3 :: b2 ::
b1 :: b0 :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ ::
⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: [])
else
bitstring.v2w
(b7 :: ¬b6 :: b6 :: b6 :: b6 :: b6 :: b6 :: b6 :: b6 :: b6 :: b5 ::
b4 :: b3 :: b2 :: b1 :: b0 :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ ::
⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ ::
⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ ::
⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ ::
⊥ :: ⊥ :: [])
⊦ ∀n f registers b s.
n < 15 ⇒
(if words.word_bit (suc n) registers then
(words.word_add
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (n + 1) registers))))
(words.n2w (arithmetic.BIT2 1)),
arm.arm_state_REG_fupd
(const
(combin.UPDATE (f (words.n2w (suc n)))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_concat
(arm.arm_state_MEM s
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers)))))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers)))) (words.n2w 1)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers))))
(words.n2w (arithmetic.BIT2 0))))
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers))))
(words.n2w 3)))))
else
words.word_concat
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers)))) (words.n2w 3)))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers))))
(words.n2w (arithmetic.BIT2 0))))
(words.word_concat
(arm.arm_state_MEM s
(words.word_add
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers)))) (words.n2w 1)))
(arm.arm_state_MEM s
(words.word_add b
(words.word_mul
(words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers))))))))
(arm.arm_state_REG
(snd (arm_step.LDM_UPTO f n registers (b, s))))))
(snd (arm_step.LDM_UPTO f n registers (b, s))))
else arm_step.LDM_UPTO f n registers (b, s)) =
arm_step.LDM_UPTO f (suc n) registers (b, s)
⊦ ∀w1 w2 w3 w4 w5 w6 w7 w8.
bitstring.field 7 0
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field 15 (arithmetic.BIT2 3)
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field 31 (arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 1))))
(arithmetic.BIT2 15)
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field (bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 1))))
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field
(bit1 (bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))))
(arithmetic.BIT2 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) @
bitstring.field 63
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))))
(bitstring.w2v
(words.word_concat w1
(words.word_concat w2
(words.word_concat w3
(words.word_concat w4
(words.word_concat w5
(words.word_concat w6
(words.word_concat w7 w8)))))))) =
bitstring.w2v
(words.word_concat w8
(words.word_concat w7
(words.word_concat w6
(words.word_concat w5
(words.word_concat w4
(words.word_concat w3 (words.word_concat w2 w1)))))))
⊦ bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊥ :: []) = words.n2w 0 ∧
bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊤ :: []) = words.n2w 1 ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊥ :: []) = words.n2w (arithmetic.BIT2 0) ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊤ :: []) = words.n2w 3 ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊥ :: []) = words.n2w (arithmetic.BIT2 1) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 0)) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊤ :: []) = words.n2w 7 ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊥ :: []) = words.n2w (arithmetic.BIT2 3) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 1)) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1)) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊤ :: []) =
words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊤ :: []) = words.n2w 15
⊦ ∀w.
(if w = words.n2w 0 then c0
else if w = words.n2w 1 then c1
else if w = words.n2w (arithmetic.BIT2 0) then c2
else if w = words.n2w 3 then c3
else if w = words.n2w (arithmetic.BIT2 1) then c4
else if w = words.n2w (bit1 (arithmetic.BIT2 0)) then c5
else if w = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) then c6
else if w = words.n2w 7 then c7
else if w = words.n2w (arithmetic.BIT2 3) then c8
else if w = words.n2w (bit1 (arithmetic.BIT2 1)) then c9
else if w = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1)) then c10
else if w = words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) then c11
else if w = words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))
then c12
else if w = words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))
then c13
else if w =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))
then c14
else if w = words.n2w 15 then c15
else c16) =
if w = words.n2w 0 then c0
else if w = words.n2w 1 then c1
else if w = words.n2w (arithmetic.BIT2 0) then c2
else if w = words.n2w 3 then c3
else if w = words.n2w (arithmetic.BIT2 1) then c4
else if w = words.n2w (bit1 (arithmetic.BIT2 0)) then c5
else if w = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) then c6
else if w = words.n2w 7 then c7
else if w = words.n2w (arithmetic.BIT2 3) then c8
else if w = words.n2w (bit1 (arithmetic.BIT2 1)) then c9
else if w = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1)) then c10
else if w = words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) then c11
else if w = words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) then
c12
else if w = words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) then
c13
else if w =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))
then c14
else c15
⊦ ∀n f registers b s.
n < 15 ⇒
(if words.word_bit (suc n) registers then
(words.word_add
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w (words.bit_count_upto (n + 1) registers))))
(words.n2w (arithmetic.BIT2 1)),
arm.arm_state_MEM_fupd
(const
(combin.UPDATE
(words.word_add
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n) registers))))
(words.n2w 3))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 7 0
(arm.arm_state_REG s (f (words.n2w (suc n))))
else
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(arm.arm_state_REG s (f (words.n2w (suc n)))))
(combin.UPDATE
(words.word_add
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n) registers))))
(words.n2w (arithmetic.BIT2 0)))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 15 (arithmetic.BIT2 3)
(arm.arm_state_REG s (f (words.n2w (suc n))))
else
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(arm.arm_state_REG s (f (words.n2w (suc n)))))
(combin.UPDATE
(words.word_add
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers)))) (words.n2w 1))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(arm.arm_state_REG s (f (words.n2w (suc n))))
else
words.word_extract 15 (arithmetic.BIT2 3)
(arm.arm_state_REG s (f (words.n2w (suc n)))))
(combin.UPDATE
(words.word_add b
(words.word_mul (words.n2w (arithmetic.BIT2 1))
(words.n2w
(words.bit_count_upto (suc n)
registers))))
(if arm.PSR_E (arm.arm_state_CPSR s) then
words.word_extract 31
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 0))))
(arm.arm_state_REG s (f (words.n2w (suc n))))
else
words.word_extract 7 0
(arm.arm_state_REG s
(f (words.n2w (suc n)))))
(arm.arm_state_MEM
(snd
(arm_step.STM_UPTO f n registers
(b, s)))))))))
(snd (arm_step.STM_UPTO f n registers (b, s))))
else arm_step.STM_UPTO f n registers (b, s)) =
arm_step.STM_UPTO f (suc n) registers (b, s)
⊦ ∀m n.
arm_step.R_mode m n =
pair.pair_CASE (m, n)
(λv2 v3.
bool.literal_case
(λv4.
if v4 = words.n2w 0 then arm.RName_0usr
else if v4 = words.n2w 1 then arm.RName_1usr
else if v4 = words.n2w (arithmetic.BIT2 0) then
arm.RName_2usr
else if v4 = words.n2w 3 then arm.RName_3usr
else if v4 = words.n2w (arithmetic.BIT2 1) then
arm.RName_4usr
else if v4 = words.n2w (bit1 (arithmetic.BIT2 0)) then
arm.RName_5usr
else if v4 = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0))
then arm.RName_6usr
else if v4 = words.n2w 7 then arm.RName_7usr
else if v4 = words.n2w (arithmetic.BIT2 3) then
bool.literal_case
(λv21.
if v21 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_8fiq
else arm.RName_8usr) v2
else if v4 = words.n2w (bit1 (arithmetic.BIT2 1)) then
bool.literal_case
(λv24.
if v24 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_9fiq
else arm.RName_9usr) v2
else if v4 = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1))
then
bool.literal_case
(λv27.
if v27 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_10fiq
else arm.RName_10usr) v2
else if v4 = words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) then
bool.literal_case
(λv30.
if v30 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_11fiq
else arm.RName_11usr) v2
else if v4 =
words.n2w
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))
then
bool.literal_case
(λv33.
if v33 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_12fiq
else arm.RName_12usr) v2
else if v4 =
words.n2w
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))
then
bool.literal_case
(λv36.
if v36 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_SPfiq
else if v36 =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 3))
then arm.RName_SPirq
else if v36 =
words.n2w (bit1 (bit1 (arithmetic.BIT2 1)))
then arm.RName_SPsvc
else if v36 =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 1)))
then arm.RName_SPmon
else if v36 =
words.n2w
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
then arm.RName_SPabt
else if v36 =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 0))))
then arm.RName_SPhyp
else if v36 =
words.n2w
(bit1
(bit1
(arithmetic.BIT2
(arithmetic.BIT2 0))))
then arm.RName_SPund
else arm.RName_SPusr) v2
else if v4 =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 0)))
then
bool.literal_case
(λv45.
if v45 = words.n2w (bit1 (arithmetic.BIT2 3)) then
arm.RName_LRfiq
else if v45 =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 3))
then arm.RName_LRirq
else if v45 =
words.n2w (bit1 (bit1 (arithmetic.BIT2 1)))
then arm.RName_LRsvc
else if v45 =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 1)))
then arm.RName_LRmon
else if v45 =
words.n2w
(bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
then arm.RName_LRabt
else if v45 =
words.n2w
(bit1
(bit1
(arithmetic.BIT2
(arithmetic.BIT2 0))))
then arm.RName_LRund
else arm.RName_LRusr) v2
else arm.RName_PC) v3)
⊦ words.word_extract 31 (arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 ::
b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 ::
b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 ::
b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: []) ∧
words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 ::
b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 ::
b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 ::
b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w
(b23 :: b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: []) ∧
words.word_extract 15 (arithmetic.BIT2 3)
(bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 ::
b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 ::
b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 ::
b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w
(b15 :: b14 :: b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: []) ∧
words.word_extract 7 0
(bitstring.v2w
(b31 :: b30 :: b29 :: b28 :: b27 :: b26 :: b25 :: b24 :: b23 ::
b22 :: b21 :: b20 :: b19 :: b18 :: b17 :: b16 :: b15 :: b14 ::
b13 :: b12 :: b11 :: b10 :: b9 :: b8 :: b7 :: b6 :: b5 :: b4 ::
b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w (b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: [])
⊦ (∀w.
bitstring.v2w
(bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (bitstring.w2v w) @
bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v w))) = words.word_extract 7 0 w) ∧
(∀w.
bitstring.v2w
(bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v w)) =
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) w) ∧
(∀w.
bitstring.v2w
(bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7)
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (bitstring.w2v w) @
bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v w))) =
words.word_extract 15 (arithmetic.BIT2 3) w) ∧
(∀w.
bitstring.v2w
(bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (bitstring.w2v w)) =
words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) w) ∧
(∀w.
bitstring.v2w
(bitstring.field 15 (arithmetic.BIT2 3)
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (bitstring.w2v w) @
bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v w))) =
words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) w) ∧
(∀w.
bitstring.v2w
(bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w)) =
words.word_extract 15 (arithmetic.BIT2 3) w) ∧
(∀w.
bitstring.v2w
(bitstring.field 7 0
(bitstring.field 7 0 (bitstring.w2v w) @
bitstring.field 15 (arithmetic.BIT2 3) (bitstring.w2v w) @
bitstring.field (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 7) (bitstring.w2v w) @
bitstring.field 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
(bitstring.w2v w))) =
words.word_extract 31
(arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) w) ∧
∀w.
bitstring.v2w (bitstring.field 7 0 (bitstring.w2v w)) =
words.word_extract 7 0 w
⊦ (words.word_extract 3 0 (words.n2w 0) = words.n2w 0 ∧
words.w2w (bitstring.v2w (b2 :: b1 :: b0 :: [])) =
bitstring.v2w (⊥ :: b2 :: b1 :: b0 :: []) ∧
words.w2w
(words.word_concat (bitstring.v2w (b5 :: []))
(words.word_concat
(bitstring.v2w (b4 :: b3 :: b2 :: b1 :: b0 :: []))
(words.n2w 0))) =
bitstring.v2w (b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: ⊥ :: []) ∧
(words.word_concat (bitstring.v2w (b2 :: []))
(words.word_concat (bitstring.v2w (b1 :: []))
(bitstring.v2w (b0 :: []))) = words.n2w 0 ⇔ ¬b2 ∧ ¬b1 ∧ ¬b0) ∧
(words.word_msb (bitstring.v2w (b3 :: b2 :: b1 :: b0 :: [])) ⇔ b3) ∧
words.word_concat (bitstring.v2w (b3 :: []))
(bitstring.v2w (b2 :: b1 :: b0 :: [])) =
bitstring.v2w (b3 :: b2 :: b1 :: b0 :: []) ∧
words.word_concat (bitstring.v2w (b4 :: []))
(bitstring.v2w (b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w (b4 :: b3 :: b2 :: b1 :: b0 :: []) ∧
words.word_concat (bitstring.v2w (b4 :: b3 :: b2 :: b1 :: []))
(bitstring.v2w (b0 :: [])) =
bitstring.v2w (b4 :: b3 :: b2 :: b1 :: b0 :: []) ∧
(words.word_lo (bitstring.v2w (b3 :: b2 :: b1 :: b0 :: []))
(words.n2w (arithmetic.BIT2 3)) ⇔ ¬b3) ∧
words.word_concat (bitstring.v2w (b :: [])) (words.n2w 0) =
bitstring.v2w (b :: ⊥ :: []) ∧
words.w2w
(words.word_concat
(bitstring.v2w
(b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: []))
(words.n2w 0)) =
bitstring.v2w
(b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: ⊥ :: ⊥ :: []) ∧
words.word_extract 7 (arithmetic.BIT2 1)
(bitstring.v2w (b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w (b7 :: b6 :: b5 :: b4 :: []) ∧
words.word_extract 3 0
(bitstring.v2w (b7 :: b6 :: b5 :: b4 :: b3 :: b2 :: b1 :: b0 :: [])) =
bitstring.v2w (b3 :: b2 :: b1 :: b0 :: [])) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w 0 ⇔ ¬c ∧ ¬b ∧ ¬a) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w 1 ⇔ c ∧ ¬b ∧ ¬a) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w (arithmetic.BIT2 0) ⇔
¬c ∧ b ∧ ¬a) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w 3 ⇔ c ∧ b ∧ ¬a) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w (arithmetic.BIT2 1) ⇔
¬c ∧ ¬b ∧ a) ∧
(bitstring.v2w (a :: b :: c :: []) =
words.n2w (bit1 (arithmetic.BIT2 0)) ⇔ c ∧ ¬b ∧ a) ∧
(bitstring.v2w (a :: b :: c :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) ⇔ ¬c ∧ b ∧ a) ∧
(bitstring.v2w (a :: b :: c :: []) = words.n2w 7 ⇔ c ∧ b ∧ a)
⊦ bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: []) = words.n2w 0 ∧
bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊥ :: ⊤ :: []) = words.n2w 1 ∧
bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 0) ∧
bitstring.v2w (⊥ :: ⊥ :: ⊥ :: ⊤ :: ⊤ :: []) = words.n2w 3 ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 1) ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 0)) ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 0)) ∧
bitstring.v2w (⊥ :: ⊥ :: ⊤ :: ⊤ :: ⊤ :: []) = words.n2w 7 ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 3) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 1)) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 1)) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊥ :: ⊤ :: ⊤ :: []) =
words.n2w (bit1 (bit1 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
bitstring.v2w (⊥ :: ⊤ :: ⊤ :: ⊤ :: ⊤ :: []) = words.n2w 15 ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 7) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 3)) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 3)) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊥ :: ⊤ :: ⊤ :: []) =
words.n2w (bit1 (bit1 (arithmetic.BIT2 1))) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (bit1 (arithmetic.BIT2 1))) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 (arithmetic.BIT2 1))) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 1))) ∧
bitstring.v2w (⊤ :: ⊥ :: ⊤ :: ⊤ :: ⊤ :: []) =
words.n2w (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊥ :: ⊥ :: []) =
words.n2w (arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊥ :: ⊤ :: []) =
words.n2w (bit1 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊤ :: ⊥ :: []) =
words.n2w
(arithmetic.BIT2 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊥ :: ⊤ :: ⊤ :: []) =
words.n2w (bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊥ :: ⊥ :: []) =
words.n2w
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊥ :: ⊤ :: []) =
words.n2w
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊤ :: ⊥ :: []) =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))) ∧
bitstring.v2w (⊤ :: ⊤ :: ⊤ :: ⊤ :: ⊤ :: []) = words.n2w 31
External Type Operators
- →
- bool
- Data
- List
- list
- Option
- option
- Pair
- ×
- Sum
- Data.Sum.+
- Unit
- unit
- List
- HOL4
- arm
- arm.arm_state
- arm.exception
- arm.instruction
- arm.Architecture
- arm.CP14
- arm.CP15
- arm.Encoding
- arm.Extensions
- arm.FP
- arm.FPSCR
- arm.InstrSet
- arm.MachineCode
- arm.PSR
- arm.RName
- arm.SCR
- arm.SRType
- arm.VFPExtension
- binary_ieee
- binary_ieee.rounding
- bool
- bool.itself
- fcp
- fcp.bit0
- fcp.bit1
- fcp.cart
- integer
- integer.int
- string
- string.char
- arm
- Number
- Natural
- natural
- Natural
External Constants
- =
- select
- Data
- Bool
- ∀
- ∧
- ⇒
- ∃
- ∨
- ¬
- cond
- ⊥
- ⊤
- List
- ::
- @
- []
- all
- head
- length
- map
- tail
- Option
- none
- some
- Pair
- ,
- fst
- snd
- Unit
- ()
- Bool
- Function
- const
- id
- ∘
- HOL4
- alignment
- alignment.align
- alignment.aligned
- arithmetic
- arithmetic.-
- arithmetic.BIT2
- arithmetic.DIV2
- arm
- arm.arm_state_Architecture
- arm.arm_state_Architecture_fupd
- arm.arm_state_CP14
- arm.arm_state_CP14_fupd
- arm.arm_state_CP15
- arm.arm_state_CP15_fupd
- arm.arm_state_CPSR
- arm.arm_state_CPSR_fupd
- arm.arm_state_CurrentCondition
- arm.arm_state_CurrentCondition_fupd
- arm.arm_state_ELR_hyp
- arm.arm_state_ELR_hyp_fupd
- arm.arm_state_Encoding
- arm.arm_state_Encoding_fupd
- arm.arm_state_Extensions
- arm.arm_state_Extensions_fupd
- arm.arm_state_FP
- arm.arm_state_FP_fupd
- arm.arm_state_MEM
- arm.arm_state_MEM_fupd
- arm.arm_state_REG
- arm.arm_state_REG_fupd
- arm.arm_state_SPSR_abt
- arm.arm_state_SPSR_abt_fupd
- arm.arm_state_SPSR_fiq
- arm.arm_state_SPSR_fiq_fupd
- arm.arm_state_SPSR_hyp
- arm.arm_state_SPSR_hyp_fupd
- arm.arm_state_SPSR_irq
- arm.arm_state_SPSR_irq_fupd
- arm.arm_state_SPSR_mon
- arm.arm_state_SPSR_mon_fupd
- arm.arm_state_SPSR_svc
- arm.arm_state_SPSR_svc_fupd
- arm.arm_state_SPSR_und
- arm.arm_state_SPSR_und_fupd
- arm.arm_state_VFPExtension
- arm.arm_state_VFPExtension_fupd
- arm.arm_state_exception
- arm.arm_state_exception_fupd
- arm.arm_state_undefined
- arm.arm_state_undefined_fupd
- arm.raise'exception
- arm.rec'FPSCR
- arm.recordtype.FPSCR
- arm.reg'FPSCR
- arm.write'ITSTATE
- arm.ARM
- arm.ARMv4
- arm.ARMv4T
- arm.ARMv5T
- arm.ARMv5TE
- arm.ARMv6
- arm.ARMv6K
- arm.ARMv6T2
- arm.ARMv7_A
- arm.ARMv7_R
- arm.ASR_C
- arm.ASSERT
- arm.AddWithCarry
- arm.Align
- arm.Aligned
- arm.ArchVersion
- arm.Architecture_CASE
- arm.BadCode
- arm.BadMode
- arm.BitCount
- arm.CP15_SCR
- arm.CountLeadingZeroBits
- arm.CurrentInstrSet
- arm.CurrentModeIsHyp
- arm.Decode
- arm.DecodeARM
- arm.DecodeImmShift
- arm.DecodeRegShift
- arm.DecodeThumb
- arm.DecodeThumb2
- arm.DecodeThumbEE
- arm.Encoding_ARM
- arm.Encoding_Thumb
- arm.Extension_Security
- arm.FPSCR_AHP
- arm.FPSCR_AHP_fupd
- arm.FPSCR_C
- arm.FPSCR_CASE
- arm.FPSCR_C_fupd
- arm.FPSCR_DN
- arm.FPSCR_DN_fupd
- arm.FPSCR_DZC
- arm.FPSCR_DZC_fupd
- arm.FPSCR_DZE
- arm.FPSCR_DZE_fupd
- arm.FPSCR_FZ
- arm.FPSCR_FZ_fupd
- arm.FPSCR_IDC
- arm.FPSCR_IDC_fupd
- arm.FPSCR_IDE
- arm.FPSCR_IDE_fupd
- arm.FPSCR_IOC
- arm.FPSCR_IOC_fupd
- arm.FPSCR_IOE
- arm.FPSCR_IOE_fupd
- arm.FPSCR_IXC
- arm.FPSCR_IXC_fupd
- arm.FPSCR_IXE
- arm.FPSCR_IXE_fupd
- arm.FPSCR_N
- arm.FPSCR_N_fupd
- arm.FPSCR_OFC
- arm.FPSCR_OFC_fupd
- arm.FPSCR_OFE
- arm.FPSCR_OFE_fupd
- arm.FPSCR_QC
- arm.FPSCR_QC_fupd
- arm.FPSCR_RMode
- arm.FPSCR_RMode_fupd
- arm.FPSCR_UFC
- arm.FPSCR_UFC_fupd
- arm.FPSCR_UFE
- arm.FPSCR_UFE_fupd
- arm.FPSCR_V
- arm.FPSCR_V_fupd
- arm.FPSCR_Z
- arm.FPSCR_Z_fupd
- arm.FPSCR_fpscr'rst
- arm.FPSCR_fpscr'rst_fupd
- arm.FP_FPSCR
- arm.Fetch
- arm.HaveSecurityExt
- arm.HaveThumb2
- arm.HaveVirtExt
- arm.HighestSetBit
- arm.ISETSTATE
- arm.ITAdvance
- arm.ITSTATE
- arm.InstrSet_ARM
- arm.InstrSet_Jazelle
- arm.InstrSet_Thumb
- arm.InstrSet_ThumbEE
- arm.IsSecure
- arm.LSL_C
- arm.LSR_C
- arm.MachineCode_CASE
- arm.Next
- arm.NoException
- arm.PSR_A
- arm.PSR_A_fupd
- arm.PSR_C
- arm.PSR_C_fupd
- arm.PSR_E
- arm.PSR_E_fupd
- arm.PSR_F
- arm.PSR_F_fupd
- arm.PSR_GE
- arm.PSR_GE_fupd
- arm.PSR_I
- arm.PSR_IT
- arm.PSR_IT_fupd
- arm.PSR_I_fupd
- arm.PSR_J
- arm.PSR_J_fupd
- arm.PSR_M
- arm.PSR_M_fupd
- arm.PSR_N
- arm.PSR_N_fupd
- arm.PSR_Q
- arm.PSR_Q_fupd
- arm.PSR_T
- arm.PSR_T_fupd
- arm.PSR_V
- arm.PSR_V_fupd
- arm.PSR_Z
- arm.PSR_Z_fupd
- arm.PSR_psr'rst
- arm.PSR_psr'rst_fupd
- arm.RName2num
- arm.RName_0usr
- arm.RName_10fiq
- arm.RName_10usr
- arm.RName_11fiq
- arm.RName_11usr
- arm.RName_12fiq
- arm.RName_12usr
- arm.RName_1usr
- arm.RName_2usr
- arm.RName_3usr
- arm.RName_4usr
- arm.RName_5usr
- arm.RName_6usr
- arm.RName_7usr
- arm.RName_8fiq
- arm.RName_8usr
- arm.RName_9fiq
- arm.RName_9usr
- arm.RName_LRabt
- arm.RName_LRfiq
- arm.RName_LRirq
- arm.RName_LRmon
- arm.RName_LRsvc
- arm.RName_LRund
- arm.RName_LRusr
- arm.RName_PC
- arm.RName_SPabt
- arm.RName_SPfiq
- arm.RName_SPhyp
- arm.RName_SPirq
- arm.RName_SPmon
- arm.RName_SPsvc
- arm.RName_SPund
- arm.RName_SPusr
- arm.ROR_C
- arm.RRX_C
- arm.RoundingMode
- arm.Run
- arm.SCR_NS
- arm.SRType_ASR
- arm.SRType_CASE
- arm.SRType_LSL
- arm.SRType_LSR
- arm.SRType_ROR
- arm.SRType_RRX
- arm.Shift_C
- arm.Thumb
- arm.Thumb2
- arm.ThumbEE
- arm.UNPREDICTABLE
- arm.VFPExpandImm
- binary_ieee
- binary_ieee.roundTiesToEven
- binary_ieee.roundTowardNegative
- binary_ieee.roundTowardPositive
- binary_ieee.roundTowardZero
- bit
- bit.BIT
- bit.BITS
- bit.BITWISE
- bit.DIV_2EXP
- bit.LOG2
- bit.MOD_2EXP
- bit.TIMES_2EXP
- bitstring
- bitstring.bitify
- bitstring.field
- bitstring.fixwidth
- bitstring.replicate
- bitstring.shiftl
- bitstring.shiftr
- bitstring.testbit
- bitstring.v2n
- bitstring.v2w
- bitstring.w2v
- bitstring.zero_extend
- blast
- blast.bcarry
- blast.bsum
- blast.BCARRY
- blast.BSUM
- bool
- bool.literal_case
- bool.the_value
- bool.ARB
- bool.IN
- bool.LET
- combin
- combin.FAIL
- combin.UPDATE
- fcp
- fcp.dimindex
- fcp.fcp_index
- fcp.FCP
- integer
- integer.int_add
- integer.int_le
- integer.int_lt
- integer.int_mul
- integer.int_neg
- integer.int_of_num
- integer.int_sub
- integer.Num
- integer_word
- integer_word.w2i
- integer_word.INT_MIN
- list
- list.DROP
- list.EL
- list.FOLDL
- list.GENLIST
- list.GENLIST_AUX
- list.LIST_TO_SET
- list.PAD_LEFT
- list.SNOC
- list.TAKE
- marker
- marker.Abbrev
- numeral
- numeral.exactlog
- numeral.iDUB
- numeral.iSUB
- numeral.iZ
- numeral.iiSUC
- numeral.internal_mult
- numeral.onecount
- numeral.texp_help
- numeral_bit
- numeral_bit.iBITWISE
- numeral_bit.iDIV2
- numeral_bit.iMOD_2EXP
- numeral_bit.iSUC
- numeral_bit.FDUB
- numeral_bit.SFUNPOW
- numposrep
- numposrep.l2n
- numposrep.num_from_bin_list
- pair
- pair.pair_CASE
- pair.SWAP
- pair.UNCURRY
- pred_set
- pred_set.EMPTY
- pred_set.FINITE
- pred_set.INSERT
- pred_set.UNIV
- prim_rec
- prim_rec.PRE
- rich_list
- rich_list.COUNT_LIST
- rich_list.COUNT_LIST_AUX
- state_transformer
- state_transformer.BIND
- state_transformer.FOR
- string
- string.CHR
- sum_num
- sum_num.SUM
- words
- words.add_with_carry
- words.bit_count
- words.bit_count_upto
- words.bit_field_insert
- words.concat_word_list
- words.dimword
- words.n2w
- words.sw2sw
- words.w2n
- words.w2w
- words.word_1comp
- words.word_2comp
- words.word_H
- words.word_L
- words.word_T
- words.word_add
- words.word_asr
- words.word_bit
- words.word_bits
- words.word_concat
- words.word_div
- words.word_extract
- words.word_ge
- words.word_gt
- words.word_hi
- words.word_hs
- words.word_join
- words.word_le
- words.word_len
- words.word_lo
- words.word_log2
- words.word_ls
- words.word_lsb
- words.word_lsl
- words.word_lsr
- words.word_lt
- words.word_mod
- words.word_modify
- words.word_msb
- words.word_mul
- words.word_or
- words.word_replicate
- words.word_rol
- words.word_ror
- words.word_rrx
- words.word_sdiv
- words.word_slice
- words.word_sub
- words.word_to_hex_string
- words.BIT_SET
- words.INT_MAX
- words.INT_MIN
- words.UINT_MAX
- alignment
- Number
- Natural
- *
- +
- <
- ≤
- >
- ≥
- ↑
- bit1
- div
- even
- min
- mod
- odd
- suc
- zero
- Natural
Assumptions
⊦ ⊤
⊦ pred_set.FINITE pred_set.UNIV
⊦ pred_set.FINITE pred_set.UNIV
⊦ pred_set.FINITE pred_set.UNIV
⊦ words.word_msb words.word_L
⊦ 0 = 0
⊦ 0 < fcp.dimindex bool.the_value
⊦ 0 < words.dimword bool.the_value
⊦ 0 < words.INT_MIN bool.the_value
⊦ ∀x. x = x
⊦ ∀t. ⊥ ⇒ t
⊦ ∀v. v = ()
⊦ ∀n. 0 ≤ n
⊦ ⊥ ⇔ ∀q. q
⊦ words.word_H = words.n2w (words.INT_MAX bool.the_value)
⊦ words.word_L = words.n2w (words.INT_MIN bool.the_value)
⊦ numposrep.num_from_bin_list = numposrep.l2n (arithmetic.BIT2 0)
⊦ bool.LET = λf x. f x
⊦ pred_set.FINITE pred_set.UNIV ⇔ pred_set.FINITE pred_set.UNIV
⊦ pred_set.FINITE pred_set.UNIV ⇔ pred_set.FINITE pred_set.UNIV
⊦ integer_word.w2i words.word_L = integer_word.INT_MIN bool.the_value
⊦ fcp.dimindex bool.the_value = 1
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 0
⊦ words.INT_MIN bool.the_value < words.dimword bool.the_value
⊦ 1 < words.dimword bool.the_value
⊦ arithmetic.DIV2 (bit1 x) = x
⊦ words.w2n (words.n2w 0) = 0
⊦ ¬¬p ⇒ p
⊦ ∀x. ¬bool.IN x pred_set.EMPTY
⊦ ∀x. id x = x
⊦ ∀t. t ∨ ¬t
⊦ ∀x. marker.Abbrev x ⇔ x
⊦ ∀b. ¬bit.BIT b 0
⊦ ∀n. ¬(n < n)
⊦ ∀n. 0 < suc n
⊦ (¬) = λt. t ⇒ ⊥
⊦ (∃) = λP. P ((select) P)
⊦ ∀t. (∀x. t) ⇔ t
⊦ ∀t. (∃x. t) ⇔ t
⊦ ∀t. (λx. t x) = t
⊦ (∀) = λP. P = λx. ⊤
⊦ arithmetic.BIT2 0 = suc 1
⊦ fcp.dimindex bool.the_value = 3
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 1
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 (arithmetic.BIT2 0)
⊦ fcp.dimindex bool.the_value = bit1 (arithmetic.BIT2 0)
⊦ words.dimword bool.the_value = arithmetic.BIT2 1
⊦ integer.int_neg (integer.int_of_num 0) = integer.int_of_num 0
⊦ words.word_2comp (words.n2w 1) = words.word_T
⊦ ¬(p ⇒ q) ⇒ p
⊦ ∀x. x = x ⇔ ⊤
⊦ ∀x. integer.int_neg (integer.int_neg x) = x
⊦ ∀n. ¬(suc n = 0)
⊦ ∀n. integer.Num (integer.int_of_num n) = n
⊦ ∀c. arithmetic.- c c = 0
⊦ ∀n. n * 0 = 0
⊦ ∀n. min n n = n
⊦ ∀w. words.word_len w = fcp.dimindex bool.the_value
⊦ ∀w. bitstring.v2w (bitstring.w2v w) = w
⊦ ∀w. words.n2w (words.w2n w) = w
⊦ words.word_H = words.word_sub words.word_L (words.n2w 1)
⊦ integer_word.INT_MIN bool.the_value =
integer.int_neg (integer.int_of_num (words.INT_MIN bool.the_value))
⊦ fcp.dimindex bool.the_value = 7
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 3
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 (arithmetic.BIT2 1)
⊦ fcp.dimindex bool.the_value = bit1 (arithmetic.BIT2 1)
⊦ fcp.dimindex bool.the_value = bit1 (bit1 (arithmetic.BIT2 0))
⊦ words.w2n (words.n2w 1) = 1
⊦ ¬(p ⇒ q) ⇒ ¬q
⊦ ¬(p ∨ q) ⇒ ¬p
⊦ ¬(p ∨ q) ⇒ ¬q
⊦ ∀A. A ⇒ ¬A ⇒ ⊥
⊦ ∀A. ¬A ∧ A ⇔ ⊥
⊦ ∀x. integer.int_add x (integer.int_of_num 0) = x
⊦ ∀x. numeral.iDUB x = x + x
⊦ ∀n. rich_list.COUNT_LIST n = list.GENLIST id n
⊦ ∀n. rich_list.COUNT_LIST n = rich_list.COUNT_LIST_AUX n []
⊦ ∀m. m * 1 = m
⊦ ∀q. q div 1 = q
⊦ ∀l. list.TAKE (length l) l = l
⊦ ∀w. words.word_lsb w ⇔ fcp.fcp_index w 0
⊦ ∀w. length (bitstring.w2v w) = fcp.dimindex bool.the_value
⊦ ∀x y. const x y = x
⊦ (⇒) = λp q. p ∧ q ⇔ p
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 7
⊦ fcp.dimindex bool.the_value =
arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0)))
⊦ fcp.dimindex bool.the_value =
arithmetic.BIT2 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))
⊦ fcp.dimindex bool.the_value =
arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))
⊦ words.dimword bool.the_value =
arithmetic.BIT2 0 * words.INT_MIN bool.the_value
⊦ words.dimword bool.the_value =
arithmetic.BIT2 0 ↑ fcp.dimindex bool.the_value
⊦ words.dimword bool.the_value = arithmetic.BIT2 7
⊦ words.INT_MAX bool.the_value =
arithmetic.- (words.INT_MIN bool.the_value) 1
⊦ arithmetic.- (words.dimword bool.the_value)
(words.INT_MIN bool.the_value) = words.INT_MIN bool.the_value
⊦ ∀t. t ⇒ ⊥ ⇔ t ⇔ ⊥
⊦ ∀t. (t ⇔ ⊤) ∨ (t ⇔ ⊥)
⊦ ∀x. integer.int_mul (integer.int_of_num 0) x = integer.int_of_num 0
⊦ ∀x. integer.int_mul (integer.int_of_num 1) x = x
⊦ ∀n. arithmetic.DIV2 n = n div arithmetic.BIT2 0
⊦ ∀m. suc m = m + 1
⊦ ∀n. suc n = 1 + n
⊦ ∀n. n ≤ 0 ⇔ n = 0
⊦ ∀x. numeral_bit.FDUB numeral.iDUB x = numeral.iDUB (numeral.iDUB x)
⊦ ∀m. arithmetic.- (suc m) 1 = m
⊦ ∀l. bitstring.v2n l = numposrep.num_from_bin_list (bitstring.bitify [] l)
⊦ ∀w.
words.bit_count w =
words.bit_count_upto (fcp.dimindex bool.the_value) w
⊦ ∀w. words.word_log2 w = words.n2w (bit.LOG2 (words.w2n w))
⊦ ∀x y. fst (x, y) = x
⊦ ∀x y. snd (x, y) = y
⊦ ∀h t. head (h :: t) = h
⊦ ∀b t. (if b then t else t) = t
⊦ ∀n v. length (bitstring.fixwidth n v) = n
⊦ ∀n. words.n2w n = fcp.FCP (λi. bit.BIT i n)
⊦ ∀v. bitstring.v2w v = fcp.FCP (λi. bitstring.testbit i v)
⊦ ∀f x. bool.literal_case f x = f x
⊦ ∀f x. bool.LET f x = f x
⊦ ∀P x. P x ⇒ P ((select) P)
⊦ ∀P x. bool.IN x P ⇔ P x
⊦ ∀f n. length (list.GENLIST f n) = n
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 15
⊦ fcp.dimindex bool.the_value =
arithmetic.BIT2 (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
⊦ words.dimword bool.the_value = arithmetic.BIT2 15
⊦ pair.pair_CASE (x, y) f = f x y
⊦ ∀n. words.w2n (words.n2w n) = n mod words.dimword bool.the_value
⊦ ∀n. arithmetic.BIT2 0 * n = n + n
⊦ ∀n. words.n2w (n mod words.dimword bool.the_value) = words.n2w n
⊦ ∀l. length l = 0 ⇔ l = []
⊦ ∀v.
bitstring.w2v (bitstring.v2w v) =
bitstring.fixwidth (fcp.dimindex bool.the_value) v
⊦ ∀x. ∃q r. x = (q, r)
⊦ ∀a. pair.SWAP a = (snd a, fst a)
⊦ ∀x y. x = y ⇔ y = x
⊦ ∀t1 t2. t1 ∧ t2 ⇔ t2 ∧ t1
⊦ ∀A B. A ∨ B ⇔ B ∨ A
⊦ ∀y x. integer.int_add x y = integer.int_add y x
⊦ ∀n m. n ≥ m ⇔ m ≤ n
⊦ ∀m n. m * n = n * m
⊦ ∀m n. m + n = n + m
⊦ ∀a c. arithmetic.- (a + c) c = a
⊦ ∀l f. length (map f l) = length l
⊦ ∀v w. words.word_add v w = words.word_add w v
⊦ ∀v w. words.word_mul v w = words.word_mul w v
⊦ ∀w. words.word_1comp w = fcp.FCP (λi. ¬fcp.fcp_index w i)
⊦ fcp.dimindex bool.the_value = arithmetic.BIT2 31
⊦ (¬A ⇒ ⊥) ⇒ (A ⇒ ⊥) ⇒ ⊥
⊦ ∀n. bit1 n = n + (n + suc 0)
⊦ ∀n. 0 < n ⇒ 0 mod n = 0
⊦ ∀w.
words.word_1comp w = words.word_sub (words.word_2comp w) (words.n2w 1)
⊦ ∀w.
words.word_2comp w =
words.n2w (arithmetic.- (words.dimword bool.the_value) (words.w2n w))
⊦ ∀w.
words.word_2comp w = words.word_add (words.word_1comp w) (words.n2w 1)
⊦ ∀w.
words.word_2comp w = words.word_mul (words.word_2comp (words.n2w 1)) w
⊦ ∀w. words.bit_count w = 0 ⇔ w = words.n2w 0
⊦ ∀w. words.w2n w = 0 ⇔ w = words.n2w 0
⊦ ∀A B. A ⇒ B ⇔ ¬A ∨ B
⊦ ∀x y. integer.int_sub x y = integer.int_add x (integer.int_neg y)
⊦ ∀x y. ¬integer.int_le x y ⇔ integer.int_lt y x
⊦ ∀x y. integer.int_sub x (integer.int_neg y) = integer.int_add x y
⊦ ∀m n. m < n ⇔ suc m ≤ n
⊦ ∀m n. ¬(m < n) ⇔ n ≤ m
⊦ ∀m n. ¬(m ≤ n) ⇔ n < m
⊦ ∀h l. words.word_extract h l (words.n2w 0) = words.n2w 0
⊦ ∀n v. bitstring.zero_extend n v = list.PAD_LEFT ⊥ n v
⊦ ∀m. m = 0 ∨ ∃n. m = suc n
⊦ ∀v w. words.word_sub v w = words.word_add v (words.word_2comp w)
⊦ ∀v w. words.word_add (words.word_2comp w) v = words.word_sub v w
⊦ ∀v w. words.word_concat v w = words.w2w (words.word_join v w)
⊦ ∀g f. state_transformer.BIND g f = pair.UNCURRY f ∘ g
⊦ (∧) = λp q. (λf. f p q) = λf. f ⊤ ⊤
⊦ words.INT_MIN bool.the_value =
arithmetic.BIT2 0 ↑ arithmetic.- (fcp.dimindex bool.the_value) 1
⊦ words.word_msb (words.n2w n) ⇔
words.INT_MIN bool.the_value ≤ n mod words.dimword bool.the_value
⊦ ∀i.
integer.int_of_num (integer.Num i) = i ⇔
integer.int_le (integer.int_of_num 0) i
⊦ ∀P. ¬(∃x. P x) ⇔ ∀x. ¬P x
⊦ ∀w.
words.word_msb w ⇔
fcp.fcp_index w (arithmetic.- (fcp.dimindex bool.the_value) 1)
⊦ (∃) = λP. ∀q. (∀x. P x ⇒ q) ⇒ q
⊦ ∀x y. some x = some y ⇔ x = y
⊦ ∀a a'. a = a' ⇔ arm.RName2num a = arm.RName2num a'
⊦ ∀x y.
integer.int_neg (integer.int_mul x y) =
integer.int_mul x (integer.int_neg y)
⊦ ∀x y.
integer.int_neg (integer.int_mul x y) =
integer.int_mul (integer.int_neg x) y
⊦ ∀i n. bit.BIT i n ⇔ bool.IN i (words.BIT_SET 0 n)
⊦ ∀h l. words.word_extract h l = words.w2w ∘ words.word_bits h l
⊦ ∀n k. k < n ⇒ k mod n = k
⊦ ∀m n. ¬(m ≤ n) ⇔ suc n ≤ m
⊦ ∀m n. suc (m + n) = suc n + m
⊦ ∀m n. bool.IN m (list.LIST_TO_SET (rich_list.COUNT_LIST n)) ⇔ m < n
⊦ ∀m n. integer.int_of_num m = integer.int_of_num n ⇔ m = n
⊦ ∀m n. suc m = suc n ⇔ m = n
⊦ ∀m n.
integer.int_le (integer.int_of_num m) (integer.int_of_num n) ⇔ m ≤ n
⊦ ∀m n.
integer.int_lt (integer.int_of_num m) (integer.int_of_num n) ⇔ m < n
⊦ ∀m n. suc m < suc n ⇔ m < n
⊦ ∀m n. arithmetic.- m n = 0 ⇔ m ≤ n
⊦ ∀n v.
words.word_lsl (bitstring.v2w v) n =
bitstring.v2w (bitstring.shiftl v n)
⊦ ∀p w. alignment.aligned p w ⇔ alignment.align p w = w
⊦ ∀n w.
words.word_replicate n w =
words.concat_word_list (list.GENLIST (const w) n)
⊦ ∀v n. length (bitstring.shiftr v n) = arithmetic.- (length v) n
⊦ ∀v i. length v ≤ i ⇒ ¬bitstring.testbit i v
⊦ ∀w. ∃n. w = words.n2w n ∧ n < words.dimword bool.the_value
⊦ ∀f v. pair.UNCURRY f v = f (fst v) (snd v)
⊦ ∀n.
words.word_msb (words.n2w n) ⇔
bit.BIT (arithmetic.- (fcp.dimindex bool.the_value) 1) n
⊦ ∀n.
n < words.INT_MIN bool.the_value ⇒
integer_word.w2i (words.n2w n) = integer.int_of_num n
⊦ ∀m. arithmetic.- 0 m = 0 ∧ arithmetic.- m 0 = m
⊦ ∀f g x. (f ∘ g) x = f (g x)
⊦ ∀f. id ∘ f = f ∧ f ∘ id = f
⊦ ∀x y.
integer.int_neg (integer.int_add x y) =
integer.int_add (integer.int_neg x) (integer.int_neg y)
⊦ ∀x n. bit.TIMES_2EXP x n = n * arithmetic.BIT2 0 ↑ x
⊦ ∀m n.
integer.int_add (integer.int_of_num m) (integer.int_of_num n) =
integer.int_of_num (m + n)
⊦ ∀m n. words.word_add (words.n2w m) (words.n2w n) = words.n2w (m + n)
⊦ ∀m n. words.word_mul (words.n2w m) (words.n2w n) = words.n2w (m * n)
⊦ ∀n w. n = length w ⇒ bitstring.fixwidth n w = w
⊦ ∀l1 l2. length (l1 @ l2) = length l1 + length l2
⊦ ∀v m. bitstring.shiftr v m = list.TAKE (arithmetic.- (length v) m) v
⊦ fcp.dimindex bool.the_value =
if pred_set.FINITE pred_set.UNIV then
arithmetic.BIT2 0 * fcp.dimindex bool.the_value
else 1
⊦ ∀m n. m ≤ n ⇒ ∃p. n = m + p
⊦ ∀n.
words.word_2comp (words.n2w n) =
words.n2w
(arithmetic.- (words.dimword bool.the_value)
(n mod words.dimword bool.the_value))
⊦ ∀i. i < fcp.dimindex bool.the_value ⇒ fcp.fcp_index (fcp.FCP g) i = g i
⊦ ∀l. l = [] ∨ ∃h t. l = h :: t
⊦ ∀f v. (∀x. x = v ⇒ f x) ⇔ f v
⊦ ∀w.
¬(w = words.n2w 0) ⇒
bit.LOG2 (words.w2n w) < fcp.dimindex bool.the_value
⊦ ∀f x y. pair.UNCURRY f (x, y) = f x y
⊦ ∀f w. words.word_modify f w = fcp.FCP (λi. f i (fcp.fcp_index w i))
⊦ (∨) = λt1 t2. ∀t. (t1 ⇒ t) ⇒ (t2 ⇒ t) ⇒ t
⊦ ∀t1 t2. (t1 ⇒ t2) ⇒ (t2 ⇒ t1) ⇒ (t1 ⇔ t2)
⊦ ∀x y.
integer.int_le x y ⇔
integer.int_le (integer.int_of_num 0)
(integer.int_add y (integer.int_neg x))
⊦ ∀x y.
integer.int_lt x y ⇔
integer.int_le (integer.int_add x (integer.int_of_num 1)) y
⊦ ∀x y. integer.int_le x y ∧ integer.int_le y x ⇔ x = y
⊦ ∀m n. m = n ⇔ m ≤ n ∧ n ≤ m
⊦ ∀v n. bitstring.shiftl v n = v @ bitstring.replicate (⊥ :: []) n
⊦ ∀w n. fcp.dimindex bool.the_value ≤ n ⇒ words.word_lsr w n = words.n2w 0
⊦ ∀a b. words.word_add a b = words.n2w 0 ⇔ a = words.word_2comp b
⊦ ∀w.
∃v.
w = bitstring.v2w v ∧
marker.Abbrev (length v = fcp.dimindex bool.the_value)
⊦ ∀w n. arm.Aligned (w, n) ⇔ w = arm.Align (w, n)
⊦ (p ⇔ ¬q) ⇔ (p ∨ q) ∧ (¬q ∨ ¬p)
⊦ (∀n. P (integer.int_of_num n)) ⇔
∀x. integer.int_le (integer.int_of_num 0) x ⇒ P x
⊦ list.GENLIST f 0 = [] ∧ list.GENLIST f n = list.GENLIST_AUX f n []
⊦ ¬(¬A ∨ B) ⇒ ⊥ ⇔ A ⇒ ¬B ⇒ ⊥
⊦ ∀h l v. length (bitstring.field h l v) = arithmetic.- (suc h) l
⊦ rich_list.COUNT_LIST 0 = [] ∧
∀n. rich_list.COUNT_LIST (suc n) = list.SNOC n (rich_list.COUNT_LIST n)
⊦ ∀a b. combin.UPDATE a b = λf c. if a = c then b else f c
⊦ ∀P Q. P ∧ (∀x. Q x) ⇔ ∀x. P ∧ Q x
⊦ ∀n v. suc n = length v ⇒ bitstring.field n 0 v = v
⊦ ∀p w.
alignment.align p w =
words.word_slice (arithmetic.- (fcp.dimindex bool.the_value) 1) p w
⊦ ∀P Q. (∀x. P x) ∧ Q ⇔ ∀x. P x ∧ Q
⊦ ∀w b.
b < fcp.dimindex bool.the_value ⇒
(fcp.fcp_index w b ⇔ words.word_bit b w)
⊦ ∀w n. arm.Align (w, n) = words.n2w (n * (words.w2n w div n))
⊦ list.EL 0 = head ∧ list.EL (suc n) (l :: ls) = list.EL n ls
⊦ ¬(A ∨ B) ⇒ ⊥ ⇔ (A ⇒ ⊥) ⇒ ¬B ⇒ ⊥
⊦ ∀t1 t2 t3. t1 ∧ t2 ∧ t3 ⇔ (t1 ∧ t2) ∧ t3
⊦ ∀t1 t2 t3. t1 ⇒ t2 ⇒ t3 ⇔ t1 ∧ t2 ⇒ t3
⊦ ∀A B C. A ∨ B ∨ C ⇔ (A ∨ B) ∨ C
⊦ ∀z y x.
integer.int_add x (integer.int_add y z) =
integer.int_add (integer.int_add x y) z
⊦ ∀x y z. integer.int_add x z = integer.int_add y z ⇔ x = y
⊦ ∀m n p. arithmetic.- m n ≤ p ⇔ m ≤ n + p
⊦ ∀m n p. m * (n * p) = m * n * p
⊦ ∀m n p. m + (n + p) = m + n + p
⊦ ∀m n p. arithmetic.- (arithmetic.- m n) p = arithmetic.- m (n + p)
⊦ ∀m n p. m + p = n + p ⇔ m = n
⊦ ∀m n p. m + n ≤ m + p ⇔ n ≤ p
⊦ ∀m n p. m ≤ n ∧ n ≤ p ⇒ m ≤ p
⊦ ∀n. n ≤ length l1 ⇒ list.TAKE n (l1 @ l2) = list.TAKE n l1
⊦ ∀l1 l2 l3. l1 @ l2 @ l3 = (l1 @ l2) @ l3
⊦ ∀f g n. map f (list.GENLIST g n) = list.GENLIST (f ∘ g) n
⊦ ∀v w x.
words.word_add v (words.word_add w x) =
words.word_add (words.word_add v w) x
⊦ ∀v w x.
words.word_mul v (words.word_mul w x) =
words.word_mul (words.word_mul v w) x
⊦ ∀v w x. words.word_add v w = words.word_add v x ⇔ w = x
⊦ ∀v w x. words.word_add v w = words.word_add x w ⇔ v = x
⊦ ∀v w x. words.word_sub v w = words.word_sub x w ⇔ v = x
⊦ ∀x y.
words.word_add x y =
fcp.FCP (λi. blast.BSUM i (fcp.fcp_index x) (fcp.fcp_index y) ⊥)
⊦ ∀v w.
words.word_or v w = fcp.FCP (λi. fcp.fcp_index v i ∨ fcp.fcp_index w i)
⊦ ∀w.
integer_word.w2i w =
if words.word_msb w then
integer.int_neg (integer.int_of_num (words.w2n (words.word_2comp w)))
else integer.int_of_num (words.w2n w)
⊦ ∀t1 t2. (if ⊤ then t1 else t2) = t1 ∧ (if ⊥ then t1 else t2) = t2
⊦ ∀t1 t2. (t1 ⇔ t2) ⇔ t1 ∧ t2 ∨ ¬t1 ∧ ¬t2
⊦ ∀n m. arithmetic.- n m = if m < n then numeral.iSUB ⊤ n m else 0
⊦ ∀n x. 0 < n ⇒ (n + x) mod n = x mod n
⊦ ∀n x. 0 < n ⇒ (x + n) mod n = x mod n
⊦ ∀m n. 0 < n ⇒ (m = prim_rec.PRE n ⇔ suc m = n)
⊦ ∀x y. 0 < y ⇒ (x mod y = x ⇔ x < y)
⊦ ∀n i.
i < fcp.dimindex bool.the_value ⇒
(fcp.fcp_index (words.n2w n) i ⇔ bit.BIT i n)
⊦ ∀m n. m + n = 0 ⇔ m = 0 ∧ n = 0
⊦ ∀n m.
words.word_or (words.n2w n) (words.n2w m) =
words.n2w (bit.BITWISE (fcp.dimindex bool.the_value) (∨) n m)
⊦ ∀n f.
sum_num.SUM n f = list.FOLDL (λx n. f n + x) 0 (rich_list.COUNT_LIST n)
⊦ ∀n. all P (list.GENLIST f n) ⇔ ∀i. i < n ⇒ P (f i)
⊦ fcp.dimindex bool.the_value =
if pred_set.FINITE pred_set.UNIV then
arithmetic.BIT2 0 * fcp.dimindex bool.the_value + 1
else 1
⊦ fcp.dimindex bool.the_value =
if pred_set.FINITE pred_set.UNIV ∧ pred_set.FINITE pred_set.UNIV then
fcp.dimindex bool.the_value + fcp.dimindex bool.the_value
else 1
⊦ length [] = 0 ∧ ∀h t. length (h :: t) = suc (length t)
⊦ (∀w. words.word_add w (words.n2w 0) = w) ∧
∀w. words.word_add (words.n2w 0) w = w
⊦ ∀x y c. blast.bsum x y c ⇔ (x ⇔ ¬y) ⇔ ¬c
⊦ ∀n w.
words.bit_count_upto n w =
sum_num.SUM n (λi. if fcp.fcp_index w i then 1 else 0)
⊦ ∀f n x. x < n ⇒ list.EL x (list.GENLIST f n) = f x
⊦ ∀P. P 0 ∧ (∀n. P n ⇒ P (suc n)) ⇒ ∀n. P n
⊦ ∀w.
arm.HighestSetBit w =
if w = words.n2w 0 then integer.int_neg (integer.int_of_num 1)
else integer_word.w2i (words.word_log2 w)
⊦ ∀w.
arm.CountLeadingZeroBits w =
integer.Num
(integer.int_sub
(integer.int_sub
(integer.int_of_num (words.word_len (words.n2w 0)))
(integer.int_of_num 1)) (arm.HighestSetBit w))
⊦ rich_list.COUNT_LIST 0 = [] ∧
∀n. rich_list.COUNT_LIST (suc n) = 0 :: map suc (rich_list.COUNT_LIST n)
⊦ (∀t. ¬¬t ⇔ t) ∧ (¬⊤ ⇔ ⊥) ∧ (¬⊥ ⇔ ⊤)
⊦ ∀m n. ¬(m = n) ⇔ suc m ≤ n ∨ suc n ≤ m
⊦ ∀v n.
words.word_mul v (words.n2w (n + 1)) =
words.word_add (words.word_mul v (words.n2w n)) v
⊦ words.INT_MAX bool.the_value < words.INT_MIN bool.the_value ∧
words.INT_MIN bool.the_value ≤ words.UINT_MAX bool.the_value ∧
words.UINT_MAX bool.the_value < words.dimword bool.the_value
⊦ ∀x y s. bool.IN x (pred_set.INSERT y s) ⇔ x = y ∨ bool.IN x s
⊦ ∀A B C. A ∨ B ∧ C ⇔ (A ∨ B) ∧ (A ∨ C)
⊦ ∀A B C. B ∧ C ∨ A ⇔ (B ∨ A) ∧ (C ∨ A)
⊦ ∀state.
arm.ISETSTATE state =
words.word_concat
(bitstring.v2w (arm.PSR_J (arm.arm_state_CPSR state) :: []))
(bitstring.v2w (arm.PSR_T (arm.arm_state_CPSR state) :: []))
⊦ ∀x y z.
integer.int_mul (integer.int_add x y) z =
integer.int_add (integer.int_mul x z) (integer.int_mul y z)
⊦ ∀m n p. m ≤ n ⇔ suc p * m ≤ suc p * n
⊦ ∀h l n.
bit.BITS h l n =
bit.MOD_2EXP (arithmetic.- (suc h) l) (bit.DIV_2EXP l n)
⊦ ∀m n p. p * (m + n) = p * m + p * n
⊦ ∀m n p. (m + n) * p = m * p + n * p
⊦ ∀h l v.
bitstring.field h l v =
bitstring.fixwidth (arithmetic.- (suc h) l) (bitstring.shiftr v l)
⊦ ∀n. 0 < n ⇒ n div n = 1 ∧ n mod n = 0
⊦ ∀v w x.
words.word_mul v (words.word_add w x) =
words.word_add (words.word_mul v w) (words.word_mul v x)
⊦ ∀v w x.
words.word_mul (words.word_add v w) x =
words.word_add (words.word_mul v x) (words.word_mul w x)
⊦ ∀x y.
words.word_sub x y =
fcp.FCP (λi. blast.BSUM i (fcp.fcp_index x) ((¬) ∘ fcp.fcp_index y) ⊤)
⊦ ∀a. fcp.dimindex bool.the_value = 1 ⇒ a = words.n2w 0 ∨ a = words.n2w 1
⊦ (∀x. bit.MOD_2EXP x 0 = 0) ∧
∀x n. bit.MOD_2EXP x n = numeral_bit.iMOD_2EXP x n
⊦ ∀b f g x. (if b then f else g) x = if b then f x else g x
⊦ ∀_.
arm.HaveSecurityExt _ =
λstate.
bool.IN (arm.arm_state_Architecture state)
(pred_set.INSERT arm.ARMv6K
(pred_set.INSERT arm.ARMv7_A pred_set.EMPTY)) ∧
bool.IN arm.Extension_Security (arm.arm_state_Extensions state)
⊦ ∀m n.
words.n2w m = words.n2w n ⇔
m mod words.dimword bool.the_value = n mod words.dimword bool.the_value
⊦ ∀b w.
words.word_bit b w ⇔
b ≤ arithmetic.- (fcp.dimindex bool.the_value) 1 ∧ fcp.fcp_index w b
⊦ ∀v w.
bitstring.v2w v = bitstring.v2w w ⇔
bitstring.fixwidth (fcp.dimindex bool.the_value) v =
bitstring.fixwidth (fcp.dimindex bool.the_value) w
⊦ ∀f b x y. f (if b then x else y) = if b then f x else f y
⊦ ∀w n.
fcp.dimindex bool.the_value ≤ n ⇒
words.word_asr w n =
if words.word_msb w then words.word_T else words.n2w 0
⊦ ∀x y.
words.word_lo x y ⇔
¬blast.BCARRY (fcp.dimindex bool.the_value) (fcp.fcp_index x)
((¬) ∘ fcp.fcp_index y) ⊤
⊦ integer_word.w2i (words.n2w 1) =
if fcp.dimindex bool.the_value = 1 then
integer.int_neg (integer.int_of_num 1)
else integer.int_of_num 1
⊦ ∀x y c. blast.bcarry x y c ⇔ x ∧ y ∨ (x ∨ y) ∧ c
⊦ ∀h a b. length b = suc h ⇒ bitstring.field h 0 (a @ b) = b
⊦ ∀v.
words.w2w (bitstring.v2w v) =
bitstring.v2w
(bitstring.fixwidth
(if fcp.dimindex bool.the_value < fcp.dimindex bool.the_value then
fcp.dimindex bool.the_value
else fcp.dimindex bool.the_value) v)
⊦ ∀P Q. (∀x. P x ∧ Q x) ⇔ (∀x. P x) ∧ ∀x. Q x
⊦ (∀n. bit.DIV_2EXP n 0 = 0) ∧
∀n x. bit.DIV_2EXP n x = numeral_bit.SFUNPOW numeral_bit.iDIV2 n x
⊦ (∀n. bit.TIMES_2EXP n 0 = 0) ∧
∀n x. bit.TIMES_2EXP n x = numeral_bit.SFUNPOW numeral.iDUB n x
⊦ ∀w n.
words.bit_count_upto (suc n) w =
(if fcp.fcp_index w n then 1 else 0) + words.bit_count_upto n w
⊦ ∀m n.
n < fcp.dimindex bool.the_value ⇒
words.word_lsr m n =
words.word_div m (words.n2w (arithmetic.BIT2 0 ↑ n))
⊦ ∀P. P [] ∧ (∀t. P t ⇒ ∀h. P (h :: t)) ⇒ ∀l. P l
⊦ ∀f e x l. list.FOLDL f e (list.SNOC x l) = f (list.FOLDL f e l) x
⊦ words.INT_MIN bool.the_value = arithmetic.BIT2 16383
⊦ integer.int_le (integer.int_of_num 0) (integer.int_add c x) ⇒
integer.int_le x y ⇒
(integer.int_le (integer.int_of_num 0) (integer.int_add c y) ⇔ ⊤)
⊦ ∀m n p. m ≤ arithmetic.- n p ⇔ m + p ≤ n ∨ m ≤ 0
⊦ ∀m n p. arithmetic.- m n < p ⇔ m < n + p ∧ 0 < p
⊦ ∀m n p. n * m = p * m ⇔ m = 0 ∨ n = p
⊦ ∀p w.
alignment.align p w =
words.n2w
((words.w2n w div arithmetic.BIT2 0 ↑ p) * arithmetic.BIT2 0 ↑ p)
⊦ ∀x y.
¬(words.word_msb x ⇔ words.word_msb y) ⇒
integer_word.w2i (words.word_add x y) =
integer.int_add (integer_word.w2i x) (integer_word.w2i y)
⊦ ∀v w.
words.word_join v w =
bool.LET
(bool.LET
(λcv cw.
words.word_or (words.word_lsl cv (fcp.dimindex bool.the_value))
cw) (words.w2w v)) (words.w2w w)
⊦ words.dimword bool.the_value = arithmetic.BIT2 32767
⊦ arithmetic.DIV2 0 = 0 ∧ (∀n. arithmetic.DIV2 (bit1 n) = n) ∧
∀n. arithmetic.DIV2 (arithmetic.BIT2 n) = suc n
⊦ ∀state.
arm.Next state =
bool.LET
(pair.UNCURRY
(λv s.
arm.ITAdvance ()
(bool.LET (pair.UNCURRY (λv s. arm.Run v s))
(arm.Decode v s)))) (arm.Fetch state)
⊦ ∀x y.
x = y ⇔
∀i.
i < fcp.dimindex bool.the_value ⇒
fcp.fcp_index x i = fcp.fcp_index y i
⊦ ∀w n.
words.word_lsr w n =
fcp.FCP
(λi. i + n < fcp.dimindex bool.the_value ∧ fcp.fcp_index w (i + n))
⊦ (∀l. rich_list.COUNT_LIST_AUX 0 l = l) ∧
∀n l.
rich_list.COUNT_LIST_AUX (suc n) l =
rich_list.COUNT_LIST_AUX n (n :: l)
⊦ (∀l. list.EL 0 l = head l) ∧ ∀l n. list.EL (suc n) l = list.EL n (tail l)
⊦ ∀x y a b. (x, y) = (a, b) ⇔ x = a ∧ y = b
⊦ ∀a0 a1 a0' a1'. a0 :: a1 = a0' :: a1' ⇔ a0 = a0' ∧ a1 = a1'
⊦ ∀p w.
alignment.aligned p w ⇔
p = 0 ∨ words.word_extract (arithmetic.- p 1) 0 w = words.n2w 0
⊦ ∀v i.
i < length v ⇒
(bitstring.testbit i v ⇔
list.EL (arithmetic.- (arithmetic.- (length v) 1) i) v)
⊦ ∀w i.
i < fcp.dimindex bool.the_value ⇒
(fcp.fcp_index (words.w2w w) i ⇔
i < fcp.dimindex bool.the_value ∧ fcp.fcp_index w i)
⊦ numeral.iiSUC 0 = arithmetic.BIT2 0 ∧
numeral.iiSUC (bit1 n) = bit1 (suc n) ∧
numeral.iiSUC (arithmetic.BIT2 n) = arithmetic.BIT2 (suc n)
⊦ integer.int_le (integer.int_of_num 0) (integer.int_add c x) ⇒
integer.int_lt y (integer.int_neg x) ⇒
(integer.int_le (integer.int_of_num 0)
(integer.int_add (integer.int_neg c) y) ⇔ ⊥)
⊦ ∀n w.
words.word_replicate n w =
fcp.FCP
(λi.
i < n * fcp.dimindex bool.the_value ∧
fcp.fcp_index w (i mod fcp.dimindex bool.the_value))
⊦ ∀n.
numeral.iDUB (bit1 n) = arithmetic.BIT2 (numeral.iDUB n) ∧
numeral.iDUB (arithmetic.BIT2 n) = arithmetic.BIT2 (bit1 n) ∧
numeral.iDUB 0 = 0
⊦ ∀n.
words.INT_MIN bool.the_value ≤ n ∧ n < words.dimword bool.the_value ⇒
integer_word.w2i (words.n2w n) =
integer.int_neg
(integer.int_of_num (arithmetic.- (words.dimword bool.the_value) n))
⊦ ∀l1 n.
length l1 ≤ n ⇒
∀l2. list.DROP n (l1 @ l2) = list.DROP (arithmetic.- n (length l1)) l2
⊦ (∀f. sum_num.SUM 0 f = 0) ∧
∀m f. sum_num.SUM (suc m) f = sum_num.SUM m f + f m
⊦ (∀n. n ↑ 0 = 1) ∧ ∀m n. m ↑ suc n = m * m ↑ n
⊦ ∀i x y c.
blast.BSUM i x y c ⇔ blast.bsum (x i) (y i) (blast.BCARRY i x y c)
⊦ ∀v i.
fcp.fcp_index (bitstring.v2w v) i ⇔
if i < fcp.dimindex bool.the_value then bitstring.testbit i v
else combin.FAIL fcp.fcp_index index too large (bitstring.v2w v) i
⊦ ∀w n.
n < fcp.dimindex bool.the_value ⇒
(list.EL n (bitstring.w2v w) ⇔
fcp.fcp_index w
(arithmetic.- (arithmetic.- (fcp.dimindex bool.the_value) 1) n))
⊦ (p ⇔ q ⇒ r) ⇔ (p ∨ q) ∧ (p ∨ ¬r) ∧ (¬q ∨ r ∨ ¬p)
⊦ (p ⇔ q ∨ r) ⇔ (p ∨ ¬q) ∧ (p ∨ ¬r) ∧ (q ∨ r ∨ ¬p)
⊦ words.concat_word_list [] = words.n2w 0 ∧
∀h t.
words.concat_word_list (h :: t) =
words.word_or (words.w2w h)
(words.word_lsl (words.concat_word_list t)
(fcp.dimindex bool.the_value))
⊦ min 0 x = 0 ∧ min x 0 = 0 ∧ min x y = if x < y then x else y
⊦ (∀f v. const v ∘ f = const v) ∧ ∀f v. f ∘ const v = const (f v)
⊦ ∀b v.
bitstring.testbit b v ⇔
bool.LET (λn. b < n ∧ list.EL (arithmetic.- (arithmetic.- n 1) b) v)
(length v)
⊦ ∀n v.
bitstring.fixwidth n v =
bool.LET
(λl.
if l < n then bitstring.zero_extend n v
else list.DROP (arithmetic.- l n) v) (length v)
⊦ ∀n.
words.w2w (words.n2w n) =
if fcp.dimindex bool.the_value ≤ fcp.dimindex bool.the_value then
words.n2w n
else
words.n2w
(bit.BITS (arithmetic.- (fcp.dimindex bool.the_value) 1) 0 n)
⊦ ∀w n.
words.word_lsl w n =
fcp.FCP
(λi.
i < fcp.dimindex bool.the_value ∧ n ≤ i ∧
fcp.fcp_index w (arithmetic.- i n))
⊦ ∀x x' y y'. (x ⇔ x') ∧ (x' ⇒ (y ⇔ y')) ⇒ (x ⇒ y ⇔ x' ⇒ y')
⊦ ∀n k r. (∃q. k = q * n + r ∧ r < n) ⇒ k mod n = r
⊦ (p ⇔ q ∧ r) ⇔ (p ∨ ¬q ∨ ¬r) ∧ (q ∨ ¬p) ∧ (r ∨ ¬p)
⊦ suc 0 = 1 ∧ (∀n. suc (bit1 n) = arithmetic.BIT2 n) ∧
∀n. suc (arithmetic.BIT2 n) = bit1 (suc n)
⊦ (∀l. [] @ l = l) ∧ ∀l1 l2 h. (h :: l1) @ l2 = h :: l1 @ l2
⊦ ∀m n p. m = arithmetic.- n p ⇔ m + p = n ∨ m ≤ 0 ∧ n ≤ p
⊦ P (arithmetic.- a b) ⇔ ∀d. (b = a + d ⇒ P 0) ∧ (a = b + d ⇒ P d)
⊦ ∀A B. (¬(A ∧ B) ⇔ ¬A ∨ ¬B) ∧ (¬(A ∨ B) ⇔ ¬A ∧ ¬B)
⊦ ∀h l a.
words.bit_field_insert h l a =
words.word_modify
(λi. cond (l ≤ i ∧ i ≤ h) (fcp.fcp_index a (arithmetic.- i l)))
⊦ (∀P. all P [] ⇔ ⊤) ∧ ∀P h t. all P (h :: t) ⇔ P h ∧ all P t
⊦ list.EL (bit1 n) (l :: ls) = list.EL (prim_rec.PRE (bit1 n)) ls ∧
list.EL (arithmetic.BIT2 n) (l :: ls) = list.EL (bit1 n) ls
⊦ ∀n m.
words.word_lsl (words.n2w m) n =
if arithmetic.- (fcp.dimindex bool.the_value) 1 < n then words.n2w 0
else words.n2w (m * arithmetic.BIT2 0 ↑ n)
⊦ ∀mc.
arm.Decode mc =
λstate.
arm.MachineCode_CASE mc (λw. arm.DecodeARM w state)
(λs. arm.raise'exception (arm.UNPREDICTABLE s) state)
(λh. arm.DecodeThumb h state) (λhs. arm.DecodeThumb2 hs state)
(λh_1. arm.DecodeThumbEE h_1 state)
⊦ ∀n.
even 0 ∧ even (arithmetic.BIT2 n) ∧ ¬even (bit1 n) ∧ ¬odd 0 ∧
¬odd (arithmetic.BIT2 n) ∧ odd (bit1 n)
⊦ ∀_.
arm.IsSecure _ =
λstate.
¬arm.HaveSecurityExt () state ∨
¬arm.SCR_NS (arm.CP15_SCR (arm.arm_state_CP15 state)) ∨
arm.PSR_M (arm.arm_state_CPSR state) =
words.n2w (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 1)))
⊦ ∀h l.
words.word_bits h l =
λw.
fcp.FCP
(λi.
i + l ≤ min h (arithmetic.- (fcp.dimindex bool.the_value) 1) ∧
fcp.fcp_index w (i + l))
⊦ ∀h l.
words.word_slice h l =
λw.
fcp.FCP
(λi.
l ≤ i ∧
i ≤ min h (arithmetic.- (fcp.dimindex bool.the_value) 1) ∧
fcp.fcp_index w i)
⊦ ∀t. ((⊤ ⇔ t) ⇔ t) ∧ ((t ⇔ ⊤) ⇔ t) ∧ ((⊥ ⇔ t) ⇔ ¬t) ∧ ((t ⇔ ⊥) ⇔ ¬t)
⊦ (∀b. numposrep.l2n b [] = 0) ∧
∀b h t. numposrep.l2n b (h :: t) = h mod b + b * numposrep.l2n b t
⊦ ∀c w.
words.word_rrx (c, w) =
(words.word_lsb w,
fcp.FCP
(λi.
if i = arithmetic.- (fcp.dimindex bool.the_value) 1 then c
else fcp.fcp_index (words.word_lsr w 1) i))
⊦ ∀x carry_in.
arm.RRX_C (x, carry_in) =
(bitstring.v2w
((carry_in :: []) @
bitstring.field (arithmetic.- (words.word_len (words.n2w 0)) 1) 1
(bitstring.w2v x)), words.word_bit 0 x)
⊦ ∀w i.
i < fcp.dimindex bool.the_value ⇒
(fcp.fcp_index (words.sw2sw w) i ⇔
if i < fcp.dimindex bool.the_value ∨
fcp.dimindex bool.the_value < fcp.dimindex bool.the_value
then fcp.fcp_index w i
else words.word_msb w)
⊦ ∀x y.
¬(integer_word.w2i (words.word_add x y) =
integer.int_add (integer_word.w2i x) (integer_word.w2i y)) ⇔
(words.word_msb x ⇔ words.word_msb y) ∧
¬(words.word_msb x ⇔ words.word_msb (words.word_add x y))
⊦ ¬(arm.InstrSet_ARM = arm.InstrSet_Thumb) ∧
¬(arm.InstrSet_ARM = arm.InstrSet_Jazelle) ∧
¬(arm.InstrSet_ARM = arm.InstrSet_ThumbEE) ∧
¬(arm.InstrSet_Thumb = arm.InstrSet_Jazelle) ∧
¬(arm.InstrSet_Thumb = arm.InstrSet_ThumbEE) ∧
¬(arm.InstrSet_Jazelle = arm.InstrSet_ThumbEE)
⊦ numeral.texp_help 0 acc = arithmetic.BIT2 acc ∧
numeral.texp_help (bit1 n) acc =
numeral.texp_help (prim_rec.PRE (bit1 n)) (bit1 acc) ∧
numeral.texp_help (arithmetic.BIT2 n) acc =
numeral.texp_help (bit1 n) (bit1 acc)
⊦ (∀f e. list.FOLDL f e [] = e) ∧
∀f e x l. list.FOLDL f e (x :: l) = list.FOLDL f (f e x) l
⊦ numeral.exactlog 0 = 0 ∧ (∀n. numeral.exactlog (bit1 n) = 0) ∧
∀n.
numeral.exactlog (arithmetic.BIT2 n) =
bool.LET (λx. if x = 0 then 0 else bit1 x) (numeral.onecount n 0)
⊦ (∀x. numeral.onecount 0 x = x) ∧
(∀n x. numeral.onecount (bit1 n) x = numeral.onecount n (suc x)) ∧
∀n x. numeral.onecount (arithmetic.BIT2 n) x = 0
⊦ arithmetic.BIT2 0 ↑ 0 = 1 ∧
arithmetic.BIT2 0 ↑ bit1 n =
numeral.texp_help (prim_rec.PRE (bit1 n)) 0 ∧
arithmetic.BIT2 0 ↑ arithmetic.BIT2 n = numeral.texp_help (bit1 n) 0
⊦ ∀t. (⊤ ∧ t ⇔ t) ∧ (t ∧ ⊤ ⇔ t) ∧ (⊥ ∧ t ⇔ ⊥) ∧ (t ∧ ⊥ ⇔ ⊥) ∧ (t ∧ t ⇔ t)
⊦ ∀t. (⊤ ∨ t ⇔ ⊤) ∧ (t ∨ ⊤ ⇔ ⊤) ∧ (⊥ ∨ t ⇔ t) ∧ (t ∨ ⊥ ⇔ t) ∧ (t ∨ t ⇔ t)
⊦ ∀n i.
words.BIT_SET i n =
if n = 0 then pred_set.EMPTY
else if odd n then
pred_set.INSERT i (words.BIT_SET (suc i) (n div arithmetic.BIT2 0))
else words.BIT_SET (suc i) (n div arithmetic.BIT2 0)
⊦ ∀v1 v2.
pred_set.FINITE pred_set.UNIV ∧ pred_set.FINITE pred_set.UNIV ⇒
words.word_concat (bitstring.v2w v1) (bitstring.v2w v2) =
bitstring.v2w
(bitstring.fixwidth
(min (fcp.dimindex bool.the_value)
(fcp.dimindex bool.the_value + fcp.dimindex bool.the_value))
(v1 @ bitstring.fixwidth (fcp.dimindex bool.the_value) v2))
⊦ (∀m n.
words.word_mul (words.n2w m) (words.word_2comp (words.n2w n)) =
words.word_2comp (words.n2w (m * n))) ∧
∀m n.
words.word_mul (words.word_2comp (words.n2w m))
(words.word_2comp (words.n2w n)) = words.n2w (m * n)
⊦ ∀t. (⊤ ⇒ t ⇔ t) ∧ (t ⇒ ⊤ ⇔ ⊤) ∧ (⊥ ⇒ t ⇔ ⊤) ∧ (t ⇒ t ⇔ ⊤) ∧ (t ⇒ ⊥ ⇔ ¬t)
⊦ ∀n m p. (min m n ≤ p ⇔ m ≤ p ∨ n ≤ p) ∧ (p ≤ min m n ⇔ p ≤ m ∧ p ≤ n)
⊦ ∀h l a b.
l ≤ h ∧ length b ≤ l ⇒
bitstring.field h l (a @ b) =
bitstring.field (arithmetic.- h (length b)) (arithmetic.- l (length b))
a
⊦ (∀l1 l2 l3. l1 @ l2 = l1 @ l3 ⇔ l2 = l3) ∧
∀l1 l2 l3. l2 @ l1 = l3 @ l1 ⇔ l2 = l3
⊦ ∀w.
arm.BitCount w =
fst
(snd
(state_transformer.FOR
(0, arithmetic.- (words.word_len (words.n2w 0)) 1,
(λi state.
((),
(if words.word_bit i w then (fst state + 1, ())
else state)))) (0, ())))
⊦ ∀P Q x x' y y'.
(P ⇔ Q) ∧ (Q ⇒ x = x') ∧ (¬Q ⇒ y = y') ⇒
(if P then x else y) = if Q then x' else y'
⊦ words.INT_MIN bool.the_value = arithmetic.BIT2 1073741823
⊦ (p ⇔ q ⇔ r) ⇔ (p ∨ q ∨ r) ∧ (p ∨ ¬r ∨ ¬q) ∧ (q ∨ ¬r ∨ ¬p) ∧ (r ∨ ¬q ∨ ¬p)
⊦ ∀h l v.
length v ≤ fcp.dimindex bool.the_value ∧
fcp.dimindex bool.the_value = arithmetic.- (suc h) l ∧
fcp.dimindex bool.the_value < fcp.dimindex bool.the_value ⇒
words.word_extract h l (bitstring.v2w v) =
bitstring.v2w (bitstring.field h l v)
⊦ (∀x y c. blast.BCARRY 0 x y c ⇔ c) ∧
∀i x y c.
blast.BCARRY (suc i) x y c ⇔
blast.bcarry (x i) (y i) (blast.BCARRY i x y c)
⊦ ∀typ.
arm.DecodeRegShift typ =
bool.literal_case
(λv.
if v = words.n2w 0 then arm.SRType_LSL
else if v = words.n2w 1 then arm.SRType_LSR
else if v = words.n2w (arithmetic.BIT2 0) then arm.SRType_ASR
else if v = words.n2w 3 then arm.SRType_ROR
else bool.ARB) typ
⊦ words.dimword bool.the_value = arithmetic.BIT2 2147483647
⊦ ∀a.
a = arm.ARMv4 ∨ a = arm.ARMv4T ∨ a = arm.ARMv5T ∨ a = arm.ARMv5TE ∨
a = arm.ARMv6 ∨ a = arm.ARMv6K ∨ a = arm.ARMv6T2 ∨ a = arm.ARMv7_A ∨
a = arm.ARMv7_R
⊦ (∀a. words.word_lsl a 0 = a) ∧ (∀a. words.word_asr a 0 = a) ∧
(∀a. words.word_lsr a 0 = a) ∧ (∀a. words.word_rol a 0 = a) ∧
∀a. words.word_ror a 0 = a
⊦ ∀_.
arm.ArchVersion _ =
λstate.
arm.Architecture_CASE (arm.arm_state_Architecture state)
(arithmetic.BIT2 1) (arithmetic.BIT2 1) (bit1 (arithmetic.BIT2 0))
(bit1 (arithmetic.BIT2 0)) (arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0)) 7 7
⊦ ∀v h l i.
i < arithmetic.- (suc h) l ⇒
(list.EL i (bitstring.field h l v) ⇔
suc h ≤ i + length v ∧
list.EL (arithmetic.- (i + length v) (suc h)) v)
⊦ ∀_.
arm.CurrentInstrSet _ =
λstate.
bool.literal_case
(λv.
if v = words.n2w 0 then arm.InstrSet_ARM
else if v = words.n2w 1 then arm.InstrSet_Thumb
else if v = words.n2w (arithmetic.BIT2 0) then
arm.InstrSet_Jazelle
else if v = words.n2w 3 then arm.InstrSet_ThumbEE
else bool.ARB) (arm.ISETSTATE state)
⊦ (∀a. bitstring.bitify a [] = a) ∧
(∀l a. bitstring.bitify a (⊥ :: l) = bitstring.bitify (0 :: a) l) ∧
∀l a. bitstring.bitify a (⊤ :: l) = bitstring.bitify (1 :: a) l
⊦ ∀j i a.
state_transformer.FOR (i, j, a) =
if i = j then a i
else
state_transformer.BIND (a i)
(λu.
state_transformer.FOR
((if i < j then i + 1 else arithmetic.- i 1), j, a))
⊦ ∀v1 v2.
words.word_concat (bitstring.v2w v1) (bitstring.v2w v2) =
if pred_set.FINITE pred_set.UNIV ∧ pred_set.FINITE pred_set.UNIV then
bitstring.v2w
(bitstring.fixwidth
(min (fcp.dimindex bool.the_value)
(fcp.dimindex bool.the_value + fcp.dimindex bool.the_value))
(v1 @ bitstring.fixwidth (fcp.dimindex bool.the_value) v2))
else
combin.FAIL words.word_concat bad domain (bitstring.v2w v1)
(bitstring.v2w v2)
⊦ ∀f g.
(∀n. g (suc n) = f n (suc n)) ⇔
(∀n. g (bit1 n) = f (arithmetic.- (bit1 n) 1) (bit1 n)) ∧
∀n. g (arithmetic.BIT2 n) = f (bit1 n) (arithmetic.BIT2 n)
⊦ ∀state.
arm.RoundingMode state =
bool.literal_case
(λv.
if v = words.n2w 0 then binary_ieee.roundTiesToEven
else if v = words.n2w 1 then binary_ieee.roundTowardPositive
else if v = words.n2w (arithmetic.BIT2 0) then
binary_ieee.roundTowardNegative
else if v = words.n2w 3 then binary_ieee.roundTowardZero
else bool.ARB)
(arm.FPSCR_RMode (arm.FP_FPSCR (arm.arm_state_FP state)))
⊦ ∀n m.
numeral.internal_mult 0 n = 0 ∧ numeral.internal_mult n 0 = 0 ∧
numeral.internal_mult (bit1 n) m =
numeral.iZ (numeral.iDUB (numeral.internal_mult n m) + m) ∧
numeral.internal_mult (arithmetic.BIT2 n) m =
numeral.iDUB (numeral.iZ (numeral.internal_mult n m + m))
⊦ (∀m n.
words.word_add (words.word_2comp (words.n2w m))
(words.word_2comp (words.n2w n)) =
words.word_2comp (words.n2w (m + n))) ∧
∀m n.
words.word_add (words.n2w m) (words.word_2comp (words.n2w n)) =
if n ≤ m then words.n2w (arithmetic.- m n)
else words.word_2comp (words.n2w (arithmetic.- n m))
⊦ prim_rec.PRE 0 = 0 ∧ prim_rec.PRE 1 = 0 ∧
(∀n.
prim_rec.PRE (bit1 (bit1 n)) =
arithmetic.BIT2 (prim_rec.PRE (bit1 n))) ∧
(∀n.
prim_rec.PRE (bit1 (arithmetic.BIT2 n)) = arithmetic.BIT2 (bit1 n)) ∧
∀n. prim_rec.PRE (arithmetic.BIT2 n) = bit1 n
⊦ (∀m n.
m < bit1 n ⇔
m = arithmetic.- (bit1 n) 1 ∨ m < arithmetic.- (bit1 n) 1) ∧
∀m n. m < arithmetic.BIT2 n ⇔ m = bit1 n ∨ m < bit1 n
⊦ ∀l l' b b' f f'.
l = l' ∧ b = b' ∧
(∀x a. bool.IN x (list.LIST_TO_SET l') ⇒ f a x = f' a x) ⇒
list.FOLDL f b l = list.FOLDL f' b' l'
⊦ (p ⇔ if q then r else s) ⇔
(p ∨ q ∨ ¬s) ∧ (p ∨ ¬r ∨ ¬q) ∧ (p ∨ ¬r ∨ ¬s) ∧ (¬q ∨ r ∨ ¬p) ∧
(q ∨ s ∨ ¬p)
⊦ (∀l. rich_list.COUNT_LIST_AUX 0 l = l) ∧
(∀n l.
rich_list.COUNT_LIST_AUX (bit1 n) l =
rich_list.COUNT_LIST_AUX (arithmetic.- (bit1 n) 1)
(arithmetic.- (bit1 n) 1 :: l)) ∧
∀n l.
rich_list.COUNT_LIST_AUX (arithmetic.BIT2 n) l =
rich_list.COUNT_LIST_AUX (bit1 n) (bit1 n :: l)
⊦ ∀_.
arm.ITAdvance _ =
λstate.
if arm.HaveThumb2 () state ∧
¬(arm.arm_state_Encoding state = arm.Encoding_ARM)
then
if words.word_extract (arithmetic.BIT2 0) 0 (arm.ITSTATE state) =
words.n2w 0
then arm.write'ITSTATE (words.n2w 0) state
else
arm.write'ITSTATE
(words.bit_field_insert (arithmetic.BIT2 1) 0
(words.word_lsl
(words.word_extract (arithmetic.BIT2 1) 0
(arm.ITSTATE state)) 1) (arm.ITSTATE state)) state
else state
⊦ (∀x. numeral_bit.SFUNPOW numeral.iDUB 0 x = x) ∧
(∀y. numeral_bit.SFUNPOW numeral.iDUB y 0 = 0) ∧
(∀n x.
numeral_bit.SFUNPOW numeral.iDUB (bit1 n) x =
numeral_bit.SFUNPOW (numeral_bit.FDUB numeral.iDUB) n
(numeral.iDUB x)) ∧
∀n x.
numeral_bit.SFUNPOW numeral.iDUB (arithmetic.BIT2 n) x =
numeral_bit.SFUNPOW (numeral_bit.FDUB numeral.iDUB) n
(numeral.iDUB (numeral.iDUB x))
⊦ numeral_bit.FDUB (numeral_bit.FDUB f) 0 = 0 ∧
(∀x.
numeral_bit.FDUB (numeral_bit.FDUB f) (numeral_bit.iSUC x) =
numeral_bit.FDUB f (numeral_bit.FDUB f (numeral_bit.iSUC x))) ∧
(∀x.
numeral_bit.FDUB (numeral_bit.FDUB f) (bit1 x) =
numeral_bit.FDUB f (numeral_bit.FDUB f (bit1 x))) ∧
∀x.
numeral_bit.FDUB (numeral_bit.FDUB f) (arithmetic.BIT2 x) =
numeral_bit.FDUB f (numeral_bit.FDUB f (arithmetic.BIT2 x))
⊦ ∀m n.
0 * m = 0 ∧ m * 0 = 0 ∧ 1 * m = m ∧ m * 1 = m ∧ suc m * n = m * n + n ∧
m * suc n = m + m * n
⊦ words.dimword bool.the_value = arithmetic.BIT2 140737488355327
⊦ ∀x y carry_in.
words.add_with_carry (x, y, carry_in) =
bool.LET
(λunsigned_sum.
bool.LET
(λresult.
bool.LET
(bool.LET
(λcarry_out overflow. (result, carry_out, overflow))
(¬(words.w2n result = unsigned_sum)))
((words.word_msb x ⇔ words.word_msb y) ∧
¬(words.word_msb x ⇔ words.word_msb result)))
(words.n2w unsigned_sum))
(words.w2n x + words.w2n y + if carry_in then 1 else 0)
⊦ ∀value typ amount carry_in.
arm.Shift_C (value, typ, amount, carry_in) =
λstate.
if amount = 0 then ((value, carry_in), state)
else
arm.SRType_CASE typ (arm.LSL_C (value, amount) state)
(arm.LSR_C (value, amount) state)
(arm.ASR_C (value, amount) state)
(arm.ROR_C (value, amount) state)
(arm.RRX_C (value, carry_in), state)
⊦ ∀x y carry_in.
arm.AddWithCarry (x, y, carry_in) =
bool.LET
(λunsigned_sum.
bool.LET
(λresult.
(result, ¬(words.w2n result = unsigned_sum),
¬(integer_word.w2i result =
integer.int_add
(integer.int_add (integer_word.w2i x)
(integer_word.w2i y))
(if carry_in then integer.int_of_num 1
else integer.int_of_num 0))))
(words.n2w unsigned_sum))
(words.w2n x + words.w2n y + if carry_in then 1 else 0)
⊦ (∀f l. list.GENLIST_AUX f 0 l = l) ∧
(∀f n l.
list.GENLIST_AUX f (bit1 n) l =
list.GENLIST_AUX f (arithmetic.- (bit1 n) 1)
(f (arithmetic.- (bit1 n) 1) :: l)) ∧
∀f n l.
list.GENLIST_AUX f (arithmetic.BIT2 n) l =
list.GENLIST_AUX f (bit1 n) (f (bit1 n) :: l)
⊦ (∀m n. integer.int_of_num m = integer.int_of_num n ⇔ m = n) ∧
(∀x y. integer.int_neg x = integer.int_neg y ⇔ x = y) ∧
∀n m.
(integer.int_of_num n = integer.int_neg (integer.int_of_num m) ⇔
n = 0 ∧ m = 0) ∧
(integer.int_neg (integer.int_of_num n) = integer.int_of_num m ⇔
n = 0 ∧ m = 0)
⊦ ∀F'F'.
∃b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
F'F' =
arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13
b14 c b15 b16 b17 b18 c0
⊦ ∀f.
(∀x. numeral_bit.SFUNPOW (numeral_bit.FDUB f) 0 x = x) ∧
(∀y. numeral_bit.SFUNPOW (numeral_bit.FDUB f) y 0 = 0) ∧
(∀n x.
numeral_bit.SFUNPOW (numeral_bit.FDUB f) (bit1 n) x =
numeral_bit.SFUNPOW (numeral_bit.FDUB (numeral_bit.FDUB f)) n
(numeral_bit.FDUB f x)) ∧
∀n x.
numeral_bit.SFUNPOW (numeral_bit.FDUB f) (arithmetic.BIT2 n) x =
numeral_bit.SFUNPOW (numeral_bit.FDUB (numeral_bit.FDUB f)) n
(numeral_bit.FDUB f (numeral_bit.FDUB f x))
⊦ (∀l. list.DROP 0 l = l) ∧ (∀n. list.DROP (bit1 n) [] = []) ∧
(∀n. list.DROP (arithmetic.BIT2 n) [] = []) ∧
(∀n h t.
list.DROP (bit1 n) (h :: t) = list.DROP (arithmetic.- (bit1 n) 1) t) ∧
∀n h t. list.DROP (arithmetic.BIT2 n) (h :: t) = list.DROP (bit1 n) t
⊦ ∀v w.
words.word_mul (words.n2w 0) v = words.n2w 0 ∧
words.word_mul v (words.n2w 0) = words.n2w 0 ∧
words.word_mul (words.n2w 1) v = v ∧
words.word_mul v (words.n2w 1) = v ∧
words.word_mul (words.word_add v (words.n2w 1)) w =
words.word_add (words.word_mul v w) w ∧
words.word_mul v (words.word_add w (words.n2w 1)) =
words.word_add v (words.word_mul v w)
⊦ ∀n m.
(0 ≤ n ⇔ ⊤) ∧ (bit1 n ≤ 0 ⇔ ⊥) ∧ (arithmetic.BIT2 n ≤ 0 ⇔ ⊥) ∧
(bit1 n ≤ bit1 m ⇔ n ≤ m) ∧ (bit1 n ≤ arithmetic.BIT2 m ⇔ n ≤ m) ∧
(arithmetic.BIT2 n ≤ bit1 m ⇔ ¬(m ≤ n)) ∧
(arithmetic.BIT2 n ≤ arithmetic.BIT2 m ⇔ n ≤ m)
⊦ ∀n m.
(0 < bit1 n ⇔ ⊤) ∧ (0 < arithmetic.BIT2 n ⇔ ⊤) ∧ (n < 0 ⇔ ⊥) ∧
(bit1 n < bit1 m ⇔ n < m) ∧
(arithmetic.BIT2 n < arithmetic.BIT2 m ⇔ n < m) ∧
(bit1 n < arithmetic.BIT2 m ⇔ ¬(m < n)) ∧
(arithmetic.BIT2 n < bit1 m ⇔ n < m)
⊦ ∀n m.
(0 = bit1 n ⇔ ⊥) ∧ (bit1 n = 0 ⇔ ⊥) ∧ (0 = arithmetic.BIT2 n ⇔ ⊥) ∧
(arithmetic.BIT2 n = 0 ⇔ ⊥) ∧ (bit1 n = arithmetic.BIT2 m ⇔ ⊥) ∧
(arithmetic.BIT2 n = bit1 m ⇔ ⊥) ∧ (bit1 n = bit1 m ⇔ n = m) ∧
(arithmetic.BIT2 n = arithmetic.BIT2 m ⇔ n = m)
⊦ (∀x f a. bit.BITWISE x f 0 0 = numeral_bit.iBITWISE x f 0 0) ∧
(∀x f a. bit.BITWISE x f a 0 = numeral_bit.iBITWISE x f a 0) ∧
(∀x f b. bit.BITWISE x f 0 b = numeral_bit.iBITWISE x f 0 b) ∧
∀x f a b. bit.BITWISE x f a b = numeral_bit.iBITWISE x f a b
⊦ ∀x shift.
arm.ROR_C (x, shift) =
λstate.
(bool.LET (λresult. (result, words.word_msb result))
(words.word_ror x shift),
(if shift = 0 then
snd
(arm.raise'exception
(arm.ASSERT
(string.CHR
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(bit1
(bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR (bit1 (bit1 (arithmetic.BIT2 7))) :: []))
state)
else state))
⊦ ∀m n p.
integer.int_sub p (integer.int_of_num 0) = p ∧
integer.int_sub (integer.int_of_num 0) p = integer.int_neg p ∧
integer.int_sub (integer.int_of_num m) (integer.int_of_num n) =
integer.int_add (integer.int_of_num m)
(integer.int_neg (integer.int_of_num n)) ∧
integer.int_sub (integer.int_neg (integer.int_of_num m))
(integer.int_of_num n) =
integer.int_add (integer.int_neg (integer.int_of_num m))
(integer.int_neg (integer.int_of_num n)) ∧
integer.int_sub (integer.int_of_num m)
(integer.int_neg (integer.int_of_num n)) =
integer.int_add (integer.int_of_num m) (integer.int_of_num n) ∧
integer.int_sub (integer.int_neg (integer.int_of_num m))
(integer.int_neg (integer.int_of_num n)) =
integer.int_add (integer.int_neg (integer.int_of_num m))
(integer.int_of_num n)
⊦ ∀x shift.
arm.ASR_C (x, shift) =
λstate.
((words.word_asr x shift,
words.word_bit
(arithmetic.- (min (words.word_len (words.n2w 0)) shift) 1) x),
(if shift = 0 then
snd
(arm.raise'exception
(arm.ASSERT
(string.CHR (bit1 (arithmetic.BIT2 15)) ::
string.CHR
(bit1
(bit1
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(bit1
(bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR (bit1 (bit1 (arithmetic.BIT2 7))) :: []))
state)
else state))
⊦ ∀x shift.
arm.LSL_C (x, shift) =
λstate.
((words.word_lsl x shift,
bitstring.testbit (words.word_len (words.n2w 0))
(bitstring.w2v x @ bitstring.replicate (⊥ :: []) shift)),
(if shift = 0 then
snd
(arm.raise'exception
(arm.ASSERT
(string.CHR
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 3)))) ::
string.CHR
(bit1
(bit1
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 3)))) ::
string.CHR
(bit1
(bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR (bit1 (bit1 (arithmetic.BIT2 7))) :: []))
state)
else state))
⊦ ∀x shift.
arm.LSR_C (x, shift) =
λstate.
((words.word_lsr x shift,
shift ≤ words.word_len (words.n2w 0) ∧
words.word_bit (arithmetic.- shift 1) x),
(if shift = 0 then
snd
(arm.raise'exception
(arm.ASSERT
(string.CHR
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 3)))) ::
string.CHR
(bit1
(bit1
(arithmetic.BIT2
(bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 1))))) ::
string.CHR
(bit1
(bit1 (bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR (bit1 (bit1 (arithmetic.BIT2 7))) :: []))
state)
else state))
⊦ (∀opr a b. numeral_bit.iBITWISE 0 opr a b = 0) ∧
(∀x opr a b.
numeral_bit.iBITWISE (bit1 x) opr a b =
bool.LET (λw. if opr (odd a) (odd b) then bit1 w else numeral.iDUB w)
(numeral_bit.iBITWISE (arithmetic.- (bit1 x) 1) opr
(arithmetic.DIV2 a) (arithmetic.DIV2 b))) ∧
∀x opr a b.
numeral_bit.iBITWISE (arithmetic.BIT2 x) opr a b =
bool.LET (λw. if opr (odd a) (odd b) then bit1 w else numeral.iDUB w)
(numeral_bit.iBITWISE (bit1 x) opr (arithmetic.DIV2 a)
(arithmetic.DIV2 b))
⊦ ∀typ imm5.
arm.DecodeImmShift (typ, imm5) =
bool.literal_case
(λv.
if v = words.n2w 0 then (arm.SRType_LSL, words.w2n imm5)
else if v = words.n2w 1 then
(arm.SRType_LSR,
(if imm5 = words.n2w 0 then arithmetic.BIT2 15
else words.w2n imm5))
else if v = words.n2w (arithmetic.BIT2 0) then
(arm.SRType_ASR,
(if imm5 = words.n2w 0 then arithmetic.BIT2 15
else words.w2n imm5))
else if v = words.n2w 3 then
if imm5 = words.n2w 0 then (arm.SRType_RRX, 1)
else (arm.SRType_ROR, words.w2n imm5)
else bool.ARB) typ
⊦ ∀a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 a19
a20 a21 f.
arm.FPSCR_CASE
(arm.recordtype.FPSCR a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13
a14 a15 a16 a17 a18 a19 a20 a21) f =
f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 a19
a20 a21
⊦ ∀p n m.
integer.int_add (integer.int_of_num 0) p = p ∧
integer.int_add p (integer.int_of_num 0) = p ∧
integer.int_add (integer.int_of_num n) (integer.int_of_num m) =
integer.int_of_num (n + m) ∧
integer.int_add (integer.int_of_num n)
(integer.int_neg (integer.int_of_num m)) =
(if m ≤ n then integer.int_of_num (arithmetic.- n m)
else integer.int_neg (integer.int_of_num (arithmetic.- m n))) ∧
integer.int_add (integer.int_neg (integer.int_of_num n))
(integer.int_of_num m) =
(if n ≤ m then integer.int_of_num (arithmetic.- m n)
else integer.int_neg (integer.int_of_num (arithmetic.- n m))) ∧
integer.int_add (integer.int_neg (integer.int_of_num n))
(integer.int_neg (integer.int_of_num m)) =
integer.int_neg (integer.int_of_num (n + m))
⊦ (∀v0 v1 v2 v3 v4. arm.SRType_CASE arm.SRType_LSL v0 v1 v2 v3 v4 = v0) ∧
(∀v0 v1 v2 v3 v4. arm.SRType_CASE arm.SRType_LSR v0 v1 v2 v3 v4 = v1) ∧
(∀v0 v1 v2 v3 v4. arm.SRType_CASE arm.SRType_ASR v0 v1 v2 v3 v4 = v2) ∧
(∀v0 v1 v2 v3 v4. arm.SRType_CASE arm.SRType_ROR v0 v1 v2 v3 v4 = v3) ∧
∀v0 v1 v2 v3 v4. arm.SRType_CASE arm.SRType_RRX v0 v1 v2 v3 v4 = v4
⊦ ∀P1 P2.
P1 = P2 ⇔
(arm.PSR_A P1 ⇔ arm.PSR_A P2) ∧ (arm.PSR_C P1 ⇔ arm.PSR_C P2) ∧
(arm.PSR_E P1 ⇔ arm.PSR_E P2) ∧ (arm.PSR_F P1 ⇔ arm.PSR_F P2) ∧
arm.PSR_GE P1 = arm.PSR_GE P2 ∧ (arm.PSR_I P1 ⇔ arm.PSR_I P2) ∧
arm.PSR_IT P1 = arm.PSR_IT P2 ∧ (arm.PSR_J P1 ⇔ arm.PSR_J P2) ∧
arm.PSR_M P1 = arm.PSR_M P2 ∧ (arm.PSR_N P1 ⇔ arm.PSR_N P2) ∧
(arm.PSR_Q P1 ⇔ arm.PSR_Q P2) ∧ (arm.PSR_T P1 ⇔ arm.PSR_T P2) ∧
(arm.PSR_V P1 ⇔ arm.PSR_V P2) ∧ (arm.PSR_Z P1 ⇔ arm.PSR_Z P2) ∧
arm.PSR_psr'rst P1 = arm.PSR_psr'rst P2
⊦ ∀p n m.
integer.int_add (integer.int_of_num 0) p = p ∧
integer.int_add p (integer.int_of_num 0) = p ∧
integer.int_neg (integer.int_of_num 0) = integer.int_of_num 0 ∧
integer.int_neg (integer.int_neg p) = p ∧
integer.int_add (integer.int_of_num n) (integer.int_of_num m) =
integer.int_of_num (numeral.iZ (n + m)) ∧
integer.int_add (integer.int_of_num n)
(integer.int_neg (integer.int_of_num m)) =
(if m ≤ n then integer.int_of_num (arithmetic.- n m)
else integer.int_neg (integer.int_of_num (arithmetic.- m n))) ∧
integer.int_add (integer.int_neg (integer.int_of_num n))
(integer.int_of_num m) =
(if n ≤ m then integer.int_of_num (arithmetic.- m n)
else integer.int_neg (integer.int_of_num (arithmetic.- n m))) ∧
integer.int_add (integer.int_neg (integer.int_of_num n))
(integer.int_neg (integer.int_of_num m)) =
integer.int_neg (integer.int_of_num (numeral.iZ (n + m)))
⊦ (∀a f f1 f2 f3 f4.
arm.MachineCode_CASE (arm.ARM a) f f1 f2 f3 f4 = f a) ∧
(∀a f f1 f2 f3 f4.
arm.MachineCode_CASE (arm.BadCode a) f f1 f2 f3 f4 = f1 a) ∧
(∀a f f1 f2 f3 f4.
arm.MachineCode_CASE (arm.Thumb a) f f1 f2 f3 f4 = f2 a) ∧
(∀a f f1 f2 f3 f4.
arm.MachineCode_CASE (arm.Thumb2 a) f f1 f2 f3 f4 = f3 a) ∧
∀a f f1 f2 f3 f4.
arm.MachineCode_CASE (arm.ThumbEE a) f f1 f2 f3 f4 = f4 a
⊦ ∀mode.
arm.BadMode mode =
λstate.
bool.literal_case
(λv.
if v = words.n2w (arithmetic.BIT2 7) then ⊥
else if v = words.n2w (bit1 (arithmetic.BIT2 3)) then ⊥
else if v = words.n2w (arithmetic.BIT2 (arithmetic.BIT2 3)) then
⊥
else if v = words.n2w (bit1 (bit1 (arithmetic.BIT2 1))) then ⊥
else if v =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 1)))
then ¬arm.HaveSecurityExt () state
else if v = words.n2w (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
then ⊥
else if v =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))))
then ¬arm.HaveVirtExt () state
else if v =
words.n2w
(bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))))
then ⊥
else if v = words.n2w 31 then ⊥
else ⊤) mode
⊦ ∀imm8 single.
arm.VFPExpandImm (imm8, single) =
if single then
words.w2w
(words.word_concat (words.word_extract 7 7 imm8)
(words.word_concat
(words.word_1comp
(words.word_extract (arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0)) imm8))
(words.word_concat
(words.word_replicate (bit1 (arithmetic.BIT2 0))
(words.word_extract
(arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0)) imm8))
(words.word_concat
(words.word_extract (bit1 (arithmetic.BIT2 0)) 0 imm8)
(words.word_replicate (bit1 (bit1 (arithmetic.BIT2 1)))
(words.n2w 0))))))
else
words.word_concat (words.word_extract 7 7 imm8)
(words.word_concat
(words.word_1comp
(words.word_extract (arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0)) imm8))
(words.word_concat
(words.word_replicate (arithmetic.BIT2 3)
(words.word_extract (arithmetic.BIT2 (arithmetic.BIT2 0))
(arithmetic.BIT2 (arithmetic.BIT2 0)) imm8))
(words.word_concat
(words.word_extract (bit1 (arithmetic.BIT2 0)) 0 imm8)
(words.word_replicate
(arithmetic.BIT2
(bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))
(words.n2w 0)))))
⊦ 0 * n = 0 ∧ n * 0 = 0 ∧
bit1 x * bit1 y = numeral.internal_mult (bit1 x) (bit1 y) ∧
bit1 x * arithmetic.BIT2 y =
bool.LET
(λn.
if odd n then
numeral.texp_help (arithmetic.DIV2 n) (prim_rec.PRE (bit1 x))
else numeral.internal_mult (bit1 x) (arithmetic.BIT2 y))
(numeral.exactlog (arithmetic.BIT2 y)) ∧
arithmetic.BIT2 x * bit1 y =
bool.LET
(λm.
if odd m then
numeral.texp_help (arithmetic.DIV2 m) (prim_rec.PRE (bit1 y))
else numeral.internal_mult (arithmetic.BIT2 x) (bit1 y))
(numeral.exactlog (arithmetic.BIT2 x)) ∧
arithmetic.BIT2 x * arithmetic.BIT2 y =
bool.LET
(λm.
bool.LET
(λn.
if odd m then
numeral.texp_help (arithmetic.DIV2 m)
(prim_rec.PRE (arithmetic.BIT2 y))
else if odd n then
numeral.texp_help (arithmetic.DIV2 n)
(prim_rec.PRE (arithmetic.BIT2 x))
else
numeral.internal_mult (arithmetic.BIT2 x)
(arithmetic.BIT2 y))
(numeral.exactlog (arithmetic.BIT2 y)))
(numeral.exactlog (arithmetic.BIT2 x))
⊦ ∀_.
arm.CurrentModeIsHyp _ =
λstate.
bool.LET
(λs.
(arm.PSR_M (arm.arm_state_CPSR s) =
words.n2w
(arithmetic.BIT2
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))), s))
(if arm.BadMode (arm.PSR_M (arm.arm_state_CPSR state)) state then
snd
(arm.raise'exception
(arm.UNPREDICTABLE
((string.CHR (arithmetic.BIT2 (arithmetic.BIT2 15)) ::
string.CHR
(bit1
(arithmetic.BIT2
(bit1 (bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR
(arithmetic.BIT2
(bit1
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR
(bit1
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 3)))) ::
string.CHR
(bit1
(bit1
(bit1
(bit1
(arithmetic.BIT2
(arithmetic.BIT2 0)))))) ::
string.CHR
(arithmetic.BIT2
(bit1
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR
(bit1
(arithmetic.BIT2
(arithmetic.BIT2
(bit1 (bit1 (arithmetic.BIT2 0)))))) ::
string.CHR
(arithmetic.BIT2
(arithmetic.BIT2
(bit1
(arithmetic.BIT2 (arithmetic.BIT2 0))))) ::
string.CHR (arithmetic.BIT2 15) :: []) @
words.word_to_hex_string
(arm.PSR_M (arm.arm_state_CPSR state)))) state)
else state)
⊦ ∀n m.
(integer.int_lt (integer.int_of_num 0) (integer.int_of_num (bit1 n)) ⇔
⊤) ∧
(integer.int_lt (integer.int_of_num 0)
(integer.int_of_num (arithmetic.BIT2 n)) ⇔ ⊤) ∧
(integer.int_lt (integer.int_of_num 0) (integer.int_of_num 0) ⇔ ⊥) ∧
(integer.int_lt (integer.int_of_num 0)
(integer.int_neg (integer.int_of_num n)) ⇔ ⊥) ∧
(integer.int_lt (integer.int_of_num n) (integer.int_of_num 0) ⇔ ⊥) ∧
(integer.int_lt (integer.int_neg (integer.int_of_num (bit1 n)))
(integer.int_of_num 0) ⇔ ⊤) ∧
(integer.int_lt
(integer.int_neg (integer.int_of_num (arithmetic.BIT2 n)))
(integer.int_of_num 0) ⇔ ⊤) ∧
(integer.int_lt (integer.int_of_num n) (integer.int_of_num m) ⇔
n < m) ∧
(integer.int_lt (integer.int_neg (integer.int_of_num (bit1 n)))
(integer.int_of_num m) ⇔ ⊤) ∧
(integer.int_lt
(integer.int_neg (integer.int_of_num (arithmetic.BIT2 n)))
(integer.int_of_num m) ⇔ ⊤) ∧
(integer.int_lt (integer.int_of_num n)
(integer.int_neg (integer.int_of_num m)) ⇔ ⊥) ∧
(integer.int_lt (integer.int_neg (integer.int_of_num n))
(integer.int_neg (integer.int_of_num m)) ⇔ m < n)
⊦ ∀n m.
(integer.int_le (integer.int_of_num 0) (integer.int_of_num 0) ⇔ ⊤) ∧
(integer.int_le (integer.int_of_num 0) (integer.int_of_num n) ⇔ ⊤) ∧
(integer.int_le (integer.int_of_num 0)
(integer.int_neg (integer.int_of_num (bit1 n))) ⇔ ⊥) ∧
(integer.int_le (integer.int_of_num 0)
(integer.int_neg (integer.int_of_num (arithmetic.BIT2 n))) ⇔ ⊥) ∧
(integer.int_le (integer.int_of_num (bit1 n)) (integer.int_of_num 0) ⇔
⊥) ∧
(integer.int_le (integer.int_of_num (arithmetic.BIT2 n))
(integer.int_of_num 0) ⇔ ⊥) ∧
(integer.int_le (integer.int_neg (integer.int_of_num (bit1 n)))
(integer.int_of_num 0) ⇔ ⊤) ∧
(integer.int_le
(integer.int_neg (integer.int_of_num (arithmetic.BIT2 n)))
(integer.int_of_num 0) ⇔ ⊤) ∧
(integer.int_le (integer.int_of_num n) (integer.int_of_num m) ⇔
n ≤ m) ∧
(integer.int_le (integer.int_of_num n)
(integer.int_neg (integer.int_of_num (bit1 m))) ⇔ ⊥) ∧
(integer.int_le (integer.int_of_num n)
(integer.int_neg (integer.int_of_num (arithmetic.BIT2 m))) ⇔ ⊥) ∧
(integer.int_le (integer.int_neg (integer.int_of_num n))
(integer.int_of_num m) ⇔ ⊤) ∧
(integer.int_le (integer.int_neg (integer.int_of_num n))
(integer.int_neg (integer.int_of_num m)) ⇔ m ≤ n)
⊦ ∀a1 a2.
a1 = a2 ⇔
arm.arm_state_Architecture a1 = arm.arm_state_Architecture a2 ∧
arm.arm_state_CP14 a1 = arm.arm_state_CP14 a2 ∧
arm.arm_state_CP15 a1 = arm.arm_state_CP15 a2 ∧
arm.arm_state_CPSR a1 = arm.arm_state_CPSR a2 ∧
arm.arm_state_CurrentCondition a1 = arm.arm_state_CurrentCondition a2 ∧
arm.arm_state_ELR_hyp a1 = arm.arm_state_ELR_hyp a2 ∧
arm.arm_state_Encoding a1 = arm.arm_state_Encoding a2 ∧
arm.arm_state_Extensions a1 = arm.arm_state_Extensions a2 ∧
arm.arm_state_FP a1 = arm.arm_state_FP a2 ∧
arm.arm_state_MEM a1 = arm.arm_state_MEM a2 ∧
arm.arm_state_REG a1 = arm.arm_state_REG a2 ∧
arm.arm_state_SPSR_abt a1 = arm.arm_state_SPSR_abt a2 ∧
arm.arm_state_SPSR_fiq a1 = arm.arm_state_SPSR_fiq a2 ∧
arm.arm_state_SPSR_hyp a1 = arm.arm_state_SPSR_hyp a2 ∧
arm.arm_state_SPSR_irq a1 = arm.arm_state_SPSR_irq a2 ∧
arm.arm_state_SPSR_mon a1 = arm.arm_state_SPSR_mon a2 ∧
arm.arm_state_SPSR_svc a1 = arm.arm_state_SPSR_svc a2 ∧
arm.arm_state_SPSR_und a1 = arm.arm_state_SPSR_und a2 ∧
arm.arm_state_VFPExtension a1 = arm.arm_state_VFPExtension a2 ∧
arm.arm_state_exception a1 = arm.arm_state_exception a2 ∧
(arm.arm_state_undefined a1 ⇔ arm.arm_state_undefined a2)
⊦ ∀F1 F2.
F1 = F2 ⇔
(arm.FPSCR_AHP F1 ⇔ arm.FPSCR_AHP F2) ∧
(arm.FPSCR_C F1 ⇔ arm.FPSCR_C F2) ∧
(arm.FPSCR_DN F1 ⇔ arm.FPSCR_DN F2) ∧
(arm.FPSCR_DZC F1 ⇔ arm.FPSCR_DZC F2) ∧
(arm.FPSCR_DZE F1 ⇔ arm.FPSCR_DZE F2) ∧
(arm.FPSCR_FZ F1 ⇔ arm.FPSCR_FZ F2) ∧
(arm.FPSCR_IDC F1 ⇔ arm.FPSCR_IDC F2) ∧
(arm.FPSCR_IDE F1 ⇔ arm.FPSCR_IDE F2) ∧
(arm.FPSCR_IOC F1 ⇔ arm.FPSCR_IOC F2) ∧
(arm.FPSCR_IOE F1 ⇔ arm.FPSCR_IOE F2) ∧
(arm.FPSCR_IXC F1 ⇔ arm.FPSCR_IXC F2) ∧
(arm.FPSCR_IXE F1 ⇔ arm.FPSCR_IXE F2) ∧
(arm.FPSCR_N F1 ⇔ arm.FPSCR_N F2) ∧
(arm.FPSCR_OFC F1 ⇔ arm.FPSCR_OFC F2) ∧
(arm.FPSCR_OFE F1 ⇔ arm.FPSCR_OFE F2) ∧
(arm.FPSCR_QC F1 ⇔ arm.FPSCR_QC F2) ∧
arm.FPSCR_RMode F1 = arm.FPSCR_RMode F2 ∧
(arm.FPSCR_UFC F1 ⇔ arm.FPSCR_UFC F2) ∧
(arm.FPSCR_UFE F1 ⇔ arm.FPSCR_UFE F2) ∧
(arm.FPSCR_V F1 ⇔ arm.FPSCR_V F2) ∧ (arm.FPSCR_Z F1 ⇔ arm.FPSCR_Z F2) ∧
arm.FPSCR_fpscr'rst F1 = arm.FPSCR_fpscr'rst F2
⊦ ∀b n m.
numeral.iSUB b 0 x = 0 ∧ numeral.iSUB ⊤ n 0 = n ∧
numeral.iSUB ⊥ (bit1 n) 0 = numeral.iDUB n ∧
numeral.iSUB ⊤ (bit1 n) (bit1 m) = numeral.iDUB (numeral.iSUB ⊤ n m) ∧
numeral.iSUB ⊥ (bit1 n) (bit1 m) = bit1 (numeral.iSUB ⊥ n m) ∧
numeral.iSUB ⊤ (bit1 n) (arithmetic.BIT2 m) =
bit1 (numeral.iSUB ⊥ n m) ∧
numeral.iSUB ⊥ (bit1 n) (arithmetic.BIT2 m) =
numeral.iDUB (numeral.iSUB ⊥ n m) ∧
numeral.iSUB ⊥ (arithmetic.BIT2 n) 0 = bit1 n ∧
numeral.iSUB ⊤ (arithmetic.BIT2 n) (bit1 m) =
bit1 (numeral.iSUB ⊤ n m) ∧
numeral.iSUB ⊥ (arithmetic.BIT2 n) (bit1 m) =
numeral.iDUB (numeral.iSUB ⊤ n m) ∧
numeral.iSUB ⊤ (arithmetic.BIT2 n) (arithmetic.BIT2 m) =
numeral.iDUB (numeral.iSUB ⊤ n m) ∧
numeral.iSUB ⊥ (arithmetic.BIT2 n) (arithmetic.BIT2 m) =
bit1 (numeral.iSUB ⊥ n m)
⊦ ∀x.
arm.reg'FPSCR x =
arm.FPSCR_CASE x
(λAHP C_1 DN DZC DZE FZ IDC IDE IOC IOE IXC IXE N OFC OFE QC RMode
UFC UFE V Z fpscr'rst.
words.word_concat (bitstring.v2w (N :: []))
(words.word_concat (bitstring.v2w (Z :: []))
(words.word_concat (bitstring.v2w (C_1 :: []))
(words.word_concat (bitstring.v2w (V :: []))
(words.word_concat (bitstring.v2w (QC :: []))
(words.word_concat (bitstring.v2w (AHP :: []))
(words.word_concat (bitstring.v2w (DN :: []))
(words.word_concat (bitstring.v2w (FZ :: []))
(words.word_concat RMode
(words.word_concat
(words.word_extract
(bit1 (arithmetic.BIT2 0)) 0
fpscr'rst)
(words.word_concat
(bitstring.v2w (IDE :: []))
(words.word_concat
(words.word_extract 7
(arithmetic.BIT2
(arithmetic.BIT2 0))
fpscr'rst)
(words.word_concat
(bitstring.v2w (IXE :: []))
(words.word_concat
(bitstring.v2w
(UFE :: []))
(words.word_concat
(bitstring.v2w
(OFE :: []))
(words.word_concat
(bitstring.v2w
(DZE :: []))
(words.word_concat
(bitstring.v2w
(IOE :: []))
(words.word_concat
(bitstring.v2w
(IDC ::
[]))
(words.word_concat
(words.word_extract
(bit1
(arithmetic.BIT2
1))
(arithmetic.BIT2
3)
fpscr'rst)
(words.word_concat
(bitstring.v2w
(IXC ::
[]))
(words.word_concat
(bitstring.v2w
(UFC ::
[]))
(words.word_concat
(bitstring.v2w
(OFC ::
[]))
(words.word_concat
(bitstring.v2w
(DZC ::
[]))
(bitstring.v2w
(IOC ::
[])))))))))))))))))))))))))
⊦ ∀x.
arm.rec'FPSCR x =
arm.recordtype.FPSCR
(words.word_bit
(arithmetic.BIT2 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)))) x)
(words.word_bit
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))) x)
(words.word_bit (bit1 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))))
x) (words.word_bit 1 x)
(words.word_bit (bit1 (arithmetic.BIT2 1)) x)
(words.word_bit (arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))))
x) (words.word_bit 7 x) (words.word_bit 15 x) (words.word_bit 0 x)
(words.word_bit (arithmetic.BIT2 3) x)
(words.word_bit (arithmetic.BIT2 1) x)
(words.word_bit (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) x)
(words.word_bit 31 x) (words.word_bit (arithmetic.BIT2 0) x)
(words.word_bit (arithmetic.BIT2 (arithmetic.BIT2 1)) x)
(words.word_bit (bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))))
x)
(words.word_extract (bit1 (bit1 (bit1 (arithmetic.BIT2 0))))
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 1))) x)
(words.word_bit 3 x)
(words.word_bit (bit1 (bit1 (arithmetic.BIT2 0))) x)
(words.word_bit
(arithmetic.BIT2 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)))) x)
(words.word_bit
(arithmetic.BIT2
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))) x)
(words.word_concat
(words.word_extract (arithmetic.BIT2 (arithmetic.BIT2 0))
(bit1 (arithmetic.BIT2 0)) x)
(words.word_concat
(words.word_extract
(arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)))
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) x)
(words.word_extract
(bit1 (arithmetic.BIT2 (arithmetic.BIT2 1)))
(arithmetic.BIT2 7) x)))
⊦ ¬(arm.ARMv4 = arm.ARMv4T) ∧ ¬(arm.ARMv4 = arm.ARMv5T) ∧
¬(arm.ARMv4 = arm.ARMv5TE) ∧ ¬(arm.ARMv4 = arm.ARMv6) ∧
¬(arm.ARMv4 = arm.ARMv6K) ∧ ¬(arm.ARMv4 = arm.ARMv6T2) ∧
¬(arm.ARMv4 = arm.ARMv7_A) ∧ ¬(arm.ARMv4 = arm.ARMv7_R) ∧
¬(arm.ARMv4T = arm.ARMv5T) ∧ ¬(arm.ARMv4T = arm.ARMv5TE) ∧
¬(arm.ARMv4T = arm.ARMv6) ∧ ¬(arm.ARMv4T = arm.ARMv6K) ∧
¬(arm.ARMv4T = arm.ARMv6T2) ∧ ¬(arm.ARMv4T = arm.ARMv7_A) ∧
¬(arm.ARMv4T = arm.ARMv7_R) ∧ ¬(arm.ARMv5T = arm.ARMv5TE) ∧
¬(arm.ARMv5T = arm.ARMv6) ∧ ¬(arm.ARMv5T = arm.ARMv6K) ∧
¬(arm.ARMv5T = arm.ARMv6T2) ∧ ¬(arm.ARMv5T = arm.ARMv7_A) ∧
¬(arm.ARMv5T = arm.ARMv7_R) ∧ ¬(arm.ARMv5TE = arm.ARMv6) ∧
¬(arm.ARMv5TE = arm.ARMv6K) ∧ ¬(arm.ARMv5TE = arm.ARMv6T2) ∧
¬(arm.ARMv5TE = arm.ARMv7_A) ∧ ¬(arm.ARMv5TE = arm.ARMv7_R) ∧
¬(arm.ARMv6 = arm.ARMv6K) ∧ ¬(arm.ARMv6 = arm.ARMv6T2) ∧
¬(arm.ARMv6 = arm.ARMv7_A) ∧ ¬(arm.ARMv6 = arm.ARMv7_R) ∧
¬(arm.ARMv6K = arm.ARMv6T2) ∧ ¬(arm.ARMv6K = arm.ARMv7_A) ∧
¬(arm.ARMv6K = arm.ARMv7_R) ∧ ¬(arm.ARMv6T2 = arm.ARMv7_A) ∧
¬(arm.ARMv6T2 = arm.ARMv7_R) ∧ ¬(arm.ARMv7_A = arm.ARMv7_R)
⊦ ∀n m.
numeral.iZ (0 + n) = n ∧ numeral.iZ (n + 0) = n ∧
numeral.iZ (bit1 n + bit1 m) = arithmetic.BIT2 (numeral.iZ (n + m)) ∧
numeral.iZ (bit1 n + arithmetic.BIT2 m) = bit1 (suc (n + m)) ∧
numeral.iZ (arithmetic.BIT2 n + bit1 m) = bit1 (suc (n + m)) ∧
numeral.iZ (arithmetic.BIT2 n + arithmetic.BIT2 m) =
arithmetic.BIT2 (suc (n + m)) ∧ suc (0 + n) = suc n ∧
suc (n + 0) = suc n ∧ suc (bit1 n + bit1 m) = bit1 (suc (n + m)) ∧
suc (bit1 n + arithmetic.BIT2 m) = arithmetic.BIT2 (suc (n + m)) ∧
suc (arithmetic.BIT2 n + bit1 m) = arithmetic.BIT2 (suc (n + m)) ∧
suc (arithmetic.BIT2 n + arithmetic.BIT2 m) =
bit1 (numeral.iiSUC (n + m)) ∧
numeral.iiSUC (0 + n) = numeral.iiSUC n ∧
numeral.iiSUC (n + 0) = numeral.iiSUC n ∧
numeral.iiSUC (bit1 n + bit1 m) = arithmetic.BIT2 (suc (n + m)) ∧
numeral.iiSUC (bit1 n + arithmetic.BIT2 m) =
bit1 (numeral.iiSUC (n + m)) ∧
numeral.iiSUC (arithmetic.BIT2 n + bit1 m) =
bit1 (numeral.iiSUC (n + m)) ∧
numeral.iiSUC (arithmetic.BIT2 n + arithmetic.BIT2 m) =
arithmetic.BIT2 (numeral.iiSUC (n + m))
⊦ (∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv4 v0 v1 v2 v3 v4 v5 v6 v7 v8 = v0) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv4T v0 v1 v2 v3 v4 v5 v6 v7 v8 = v1) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv5T v0 v1 v2 v3 v4 v5 v6 v7 v8 = v2) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv5TE v0 v1 v2 v3 v4 v5 v6 v7 v8 = v3) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv6 v0 v1 v2 v3 v4 v5 v6 v7 v8 = v4) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv6K v0 v1 v2 v3 v4 v5 v6 v7 v8 = v5) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv6T2 v0 v1 v2 v3 v4 v5 v6 v7 v8 = v6) ∧
(∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv7_A v0 v1 v2 v3 v4 v5 v6 v7 v8 = v7) ∧
∀v0 v1 v2 v3 v4 v5 v6 v7 v8.
arm.Architecture_CASE arm.ARMv7_R v0 v1 v2 v3 v4 v5 v6 v7 v8 = v8
⊦ arm.RName2num arm.RName_0usr = 0 ∧ arm.RName2num arm.RName_1usr = 1 ∧
arm.RName2num arm.RName_2usr = arithmetic.BIT2 0 ∧
arm.RName2num arm.RName_3usr = 3 ∧
arm.RName2num arm.RName_4usr = arithmetic.BIT2 1 ∧
arm.RName2num arm.RName_5usr = bit1 (arithmetic.BIT2 0) ∧
arm.RName2num arm.RName_6usr = arithmetic.BIT2 (arithmetic.BIT2 0) ∧
arm.RName2num arm.RName_7usr = 7 ∧
arm.RName2num arm.RName_8usr = arithmetic.BIT2 3 ∧
arm.RName2num arm.RName_8fiq = bit1 (arithmetic.BIT2 1) ∧
arm.RName2num arm.RName_9usr = arithmetic.BIT2 (arithmetic.BIT2 1) ∧
arm.RName2num arm.RName_9fiq = bit1 (bit1 (arithmetic.BIT2 0)) ∧
arm.RName2num arm.RName_10usr =
arithmetic.BIT2 (bit1 (arithmetic.BIT2 0)) ∧
arm.RName2num arm.RName_10fiq =
bit1 (arithmetic.BIT2 (arithmetic.BIT2 0)) ∧
arm.RName2num arm.RName_11usr =
arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0)) ∧
arm.RName2num arm.RName_11fiq = 15 ∧
arm.RName2num arm.RName_12usr = arithmetic.BIT2 7 ∧
arm.RName2num arm.RName_12fiq = bit1 (arithmetic.BIT2 3) ∧
arm.RName2num arm.RName_SPusr = arithmetic.BIT2 (arithmetic.BIT2 3) ∧
arm.RName2num arm.RName_SPfiq = bit1 (bit1 (arithmetic.BIT2 1)) ∧
arm.RName2num arm.RName_SPirq =
arithmetic.BIT2 (bit1 (arithmetic.BIT2 1)) ∧
arm.RName2num arm.RName_SPsvc =
bit1 (arithmetic.BIT2 (arithmetic.BIT2 1)) ∧
arm.RName2num arm.RName_SPabt =
arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 1)) ∧
arm.RName2num arm.RName_SPund = bit1 (bit1 (bit1 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_SPmon =
arithmetic.BIT2 (bit1 (bit1 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_SPhyp =
bit1 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRusr =
arithmetic.BIT2 (arithmetic.BIT2 (bit1 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRfiq =
bit1 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRirq =
arithmetic.BIT2 (bit1 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRsvc =
bit1 (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRabt =
arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 (arithmetic.BIT2 0))) ∧
arm.RName2num arm.RName_LRund = 31 ∧
arm.RName2num arm.RName_LRmon = arithmetic.BIT2 15 ∧
arm.RName2num arm.RName_PC = bit1 (arithmetic.BIT2 7)
⊦ (∀n. 0 + n = n) ∧ (∀n. n + 0 = n) ∧ (∀n m. n + m = numeral.iZ (n + m)) ∧
(∀n. 0 * n = 0) ∧ (∀n. n * 0 = 0) ∧ (∀n m. n * m = n * m) ∧
(∀n. arithmetic.- 0 n = 0) ∧ (∀n. arithmetic.- n 0 = n) ∧
(∀n m. arithmetic.- n m = arithmetic.- n m) ∧ (∀n. 0 ↑ bit1 n = 0) ∧
(∀n. 0 ↑ arithmetic.BIT2 n = 0) ∧ (∀n. n ↑ 0 = 1) ∧
(∀n m. n ↑ m = n ↑ m) ∧ suc 0 = 1 ∧ (∀n. suc n = suc n) ∧
prim_rec.PRE 0 = 0 ∧ (∀n. prim_rec.PRE n = prim_rec.PRE n) ∧
(∀n. n = 0 ⇔ n = 0) ∧ (∀n. 0 = n ⇔ n = 0) ∧ (∀n m. n = m ⇔ n = m) ∧
(∀n. n < 0 ⇔ ⊥) ∧ (∀n. 0 < n ⇔ 0 < n) ∧ (∀n m. n < m ⇔ n < m) ∧
(∀n. 0 > n ⇔ ⊥) ∧ (∀n. n > 0 ⇔ 0 < n) ∧ (∀n m. n > m ⇔ m < n) ∧
(∀n. 0 ≤ n ⇔ ⊤) ∧ (∀n. n ≤ 0 ⇔ n ≤ 0) ∧ (∀n m. n ≤ m ⇔ n ≤ m) ∧
(∀n. n ≥ 0 ⇔ ⊤) ∧ (∀n. 0 ≥ n ⇔ n = 0) ∧ (∀n m. n ≥ m ⇔ m ≤ n) ∧
(∀n. odd n ⇔ odd n) ∧ (∀n. even n ⇔ even n) ∧ ¬odd 0 ∧ even 0
⊦ (∀g f a.
arm.arm_state_Architecture_fupd f
(arm.arm_state_Architecture_fupd g a) =
arm.arm_state_Architecture_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_CP14_fupd f (arm.arm_state_CP14_fupd g a) =
arm.arm_state_CP14_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_CP15_fupd f (arm.arm_state_CP15_fupd g a) =
arm.arm_state_CP15_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_CPSR_fupd f (arm.arm_state_CPSR_fupd g a) =
arm.arm_state_CPSR_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_CurrentCondition_fupd f
(arm.arm_state_CurrentCondition_fupd g a) =
arm.arm_state_CurrentCondition_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_ELR_hyp_fupd f (arm.arm_state_ELR_hyp_fupd g a) =
arm.arm_state_ELR_hyp_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_Encoding_fupd f (arm.arm_state_Encoding_fupd g a) =
arm.arm_state_Encoding_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_Extensions_fupd f (arm.arm_state_Extensions_fupd g a) =
arm.arm_state_Extensions_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_FP_fupd f (arm.arm_state_FP_fupd g a) =
arm.arm_state_FP_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_MEM_fupd f (arm.arm_state_MEM_fupd g a) =
arm.arm_state_MEM_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_REG_fupd f (arm.arm_state_REG_fupd g a) =
arm.arm_state_REG_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_abt_fupd f (arm.arm_state_SPSR_abt_fupd g a) =
arm.arm_state_SPSR_abt_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_fiq_fupd f (arm.arm_state_SPSR_fiq_fupd g a) =
arm.arm_state_SPSR_fiq_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_hyp_fupd f (arm.arm_state_SPSR_hyp_fupd g a) =
arm.arm_state_SPSR_hyp_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_irq_fupd f (arm.arm_state_SPSR_irq_fupd g a) =
arm.arm_state_SPSR_irq_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_mon_fupd f (arm.arm_state_SPSR_mon_fupd g a) =
arm.arm_state_SPSR_mon_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_svc_fupd f (arm.arm_state_SPSR_svc_fupd g a) =
arm.arm_state_SPSR_svc_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_SPSR_und_fupd f (arm.arm_state_SPSR_und_fupd g a) =
arm.arm_state_SPSR_und_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_VFPExtension_fupd f
(arm.arm_state_VFPExtension_fupd g a) =
arm.arm_state_VFPExtension_fupd (f ∘ g) a) ∧
(∀g f a.
arm.arm_state_exception_fupd f (arm.arm_state_exception_fupd g a) =
arm.arm_state_exception_fupd (f ∘ g) a) ∧
∀g f a.
arm.arm_state_undefined_fupd f (arm.arm_state_undefined_fupd g a) =
arm.arm_state_undefined_fupd (f ∘ g) a
⊦ (∀v.
words.word_2comp (bitstring.v2w v) =
words.word_2comp (words.n2w (bitstring.v2n v))) ∧
(∀v.
words.word_log2 (bitstring.v2w v) =
words.word_log2 (words.n2w (bitstring.v2n v))) ∧
(∀v n.
bitstring.v2w v = words.n2w n ⇔
words.n2w (bitstring.v2n v) = words.n2w n) ∧
(∀v n.
words.n2w n = bitstring.v2w v ⇔
words.n2w n = words.n2w (bitstring.v2n v)) ∧
(∀v w.
words.word_add (bitstring.v2w v) w =
words.word_add (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_add w (bitstring.v2w v) =
words.word_add w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_sub (bitstring.v2w v) w =
words.word_sub (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_sub w (bitstring.v2w v) =
words.word_sub w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_mul (bitstring.v2w v) w =
words.word_mul (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_mul w (bitstring.v2w v) =
words.word_mul w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_sdiv (bitstring.v2w v) w =
words.word_sdiv (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_sdiv w (bitstring.v2w v) =
words.word_sdiv w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_div (bitstring.v2w v) w =
words.word_div (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_div w (bitstring.v2w v) =
words.word_div w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_mod (bitstring.v2w v) w =
words.word_mod (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_mod w (bitstring.v2w v) =
words.word_mod w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_lt (bitstring.v2w v) w ⇔
words.word_lt (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_lt w (bitstring.v2w v) ⇔
words.word_lt w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_gt (bitstring.v2w v) w ⇔
words.word_gt (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_gt w (bitstring.v2w v) ⇔
words.word_gt w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_le (bitstring.v2w v) w ⇔
words.word_le (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_le w (bitstring.v2w v) ⇔
words.word_le w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_ge (bitstring.v2w v) w ⇔
words.word_ge (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_ge w (bitstring.v2w v) ⇔
words.word_ge w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_lo (bitstring.v2w v) w ⇔
words.word_lo (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_lo w (bitstring.v2w v) ⇔
words.word_lo w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_hi (bitstring.v2w v) w ⇔
words.word_hi (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_hi w (bitstring.v2w v) ⇔
words.word_hi w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_ls (bitstring.v2w v) w ⇔
words.word_ls (words.n2w (bitstring.v2n v)) w) ∧
(∀v w.
words.word_ls w (bitstring.v2w v) ⇔
words.word_ls w (words.n2w (bitstring.v2n v))) ∧
(∀v w.
words.word_hs (bitstring.v2w v) w ⇔
words.word_hs (words.n2w (bitstring.v2n v)) w) ∧
∀v w.
words.word_hs w (bitstring.v2w v) ⇔
words.word_hs w (words.n2w (bitstring.v2n v))
⊦ (∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_AHP
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_C
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b0) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_DN
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b1) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_DZC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b2) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_DZE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b3) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_FZ
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b4) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IDC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b5) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IDE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b6) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IOC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b7) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IOE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b8) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IXC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b9) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_IXE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b10) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_N
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b11) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_OFC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b12) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_OFE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b13) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_QC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b14) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_RMode
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) = c) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_UFC
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b15) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_UFE
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b16) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_V
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b17) ∧
(∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_Z
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12
b13 b14 c b15 b16 b17 b18 c0) ⇔ b18) ∧
∀b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 c b15 b16 b17 b18
c0.
arm.FPSCR_fpscr'rst
(arm.recordtype.FPSCR b b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13
b14 c b15 b16 b17 b18 c0) = c0
⊦ (∀f P. arm.PSR_A (arm.PSR_C_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_E_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_F_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_GE_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_I_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_IT_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_J_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_M_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_N_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_Q_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_T_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_V_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_Z_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_A (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_A P) ∧
(∀f P. arm.PSR_C (arm.PSR_A_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_E_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_F_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_GE_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_I_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_IT_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_J_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_M_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_N_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_Q_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_T_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_V_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_Z_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_C (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_C P) ∧
(∀f P. arm.PSR_E (arm.PSR_A_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_C_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_F_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_GE_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_I_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_IT_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_J_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_M_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_N_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_Q_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_T_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_V_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_Z_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_E (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_E P) ∧
(∀f P. arm.PSR_F (arm.PSR_A_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_C_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_E_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_GE_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_I_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_IT_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_J_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_M_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_N_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_Q_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_T_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_V_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_Z_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_F (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_F P) ∧
(∀f P. arm.PSR_GE (arm.PSR_A_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_C_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_E_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_F_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_I_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_IT_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_J_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_M_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_N_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_Q_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_T_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_V_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_Z_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_GE (arm.PSR_psr'rst_fupd f P) = arm.PSR_GE P) ∧
(∀f P. arm.PSR_I (arm.PSR_A_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_C_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_E_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_F_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_GE_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_IT_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_J_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_M_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_N_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_Q_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_T_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_V_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_Z_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_I (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_I P) ∧
(∀f P. arm.PSR_IT (arm.PSR_A_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_C_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_E_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_F_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_GE_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_I_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_J_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_M_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_N_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_Q_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_T_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_V_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_Z_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_IT (arm.PSR_psr'rst_fupd f P) = arm.PSR_IT P) ∧
(∀f P. arm.PSR_J (arm.PSR_A_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_C_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_E_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_F_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_GE_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_I_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_IT_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_M_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_N_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_Q_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_T_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_V_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_Z_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_J (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_J P) ∧
(∀f P. arm.PSR_M (arm.PSR_A_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_C_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_E_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_F_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_GE_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_I_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_IT_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_J_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_N_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_Q_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_T_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_V_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_Z_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_M (arm.PSR_psr'rst_fupd f P) = arm.PSR_M P) ∧
(∀f P. arm.PSR_N (arm.PSR_A_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_C_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_E_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_F_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_GE_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_I_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_IT_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_J_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_M_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_Q_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_T_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_V_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_Z_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_N (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_N P) ∧
(∀f P. arm.PSR_Q (arm.PSR_A_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_C_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_E_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_F_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_GE_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_I_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_IT_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_J_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_M_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_N_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_T_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_V_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_Z_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_Q (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_Q P) ∧
(∀f P. arm.PSR_T (arm.PSR_A_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_C_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_E_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_F_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_GE_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_I_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_IT_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_J_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_M_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_N_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_Q_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_V_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_Z_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_T (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_T P) ∧
(∀f P. arm.PSR_V (arm.PSR_A_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_C_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_E_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_F_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_GE_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_I_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_IT_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_J_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_M_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_N_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_Q_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_T_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_Z_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_V (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_V P) ∧
(∀f P. arm.PSR_Z (arm.PSR_A_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_C_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_E_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_F_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_GE_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_I_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_IT_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_J_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_M_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_N_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_Q_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_T_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_V_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_Z (arm.PSR_psr'rst_fupd f P) ⇔ arm.PSR_Z P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_A_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_C_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_E_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_F_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_GE_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_I_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_IT_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_J_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_M_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_N_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_Q_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_T_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_V_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_psr'rst (arm.PSR_Z_fupd f P) = arm.PSR_psr'rst P) ∧
(∀f P. arm.PSR_A (arm.PSR_A_fupd f P) ⇔ f (arm.PSR_A P)) ∧
(∀f P. arm.PSR_C (arm.PSR_C_fupd f P) ⇔ f (arm.PSR_C P)) ∧
(∀f P. arm.PSR_E (arm.PSR_E_fupd f P) ⇔ f (arm.PSR_E P)) ∧
(∀f P. arm.PSR_F (arm.PSR_F_fupd f P) ⇔ f (arm.PSR_F P)) ∧
(∀f P. arm.PSR_GE (arm.PSR_GE_fupd f P) = f (arm.PSR_GE P)) ∧
(∀f P. arm.PSR_I (arm.PSR_I_fupd f P) ⇔ f (arm.PSR_I P)) ∧
(∀f P. arm.PSR_IT (arm.PSR_IT_fupd f P) = f (arm.PSR_IT P)) ∧
(∀f P. arm.PSR_J (arm.PSR_J_fupd f P) ⇔ f (arm.PSR_J P)) ∧
(∀f P. arm.PSR_M (arm.PSR_M_fupd f P) = f (arm.PSR_M P)) ∧
(∀f P. arm.PSR_N (arm.PSR_N_fupd f P) ⇔ f (arm.PSR_N P)) ∧
(∀f P. arm.PSR_Q (arm.PSR_Q_fupd f P) ⇔ f (arm.PSR_Q P)) ∧
(∀f P. arm.PSR_T (arm.PSR_T_fupd f P) ⇔ f (arm.PSR_T P)) ∧
(∀f P. arm.PSR_V (arm.PSR_V_fupd f P) ⇔ f (arm.PSR_V P)) ∧
(∀f P. arm.PSR_Z (arm.PSR_Z_fupd f P) ⇔ f (arm.PSR_Z P)) ∧
∀f P. arm.PSR_psr'rst (arm.PSR_psr'rst_fupd f P) = f (arm.PSR_psr'rst P)
⊦ (∀g f F.
arm.FPSCR_C_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_C_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DN_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_DN_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DN_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_DN_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_DZC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_DZC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_DZC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_DZE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_DZE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_DZE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_DZE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_DZE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_FZ_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_FZ_fupd f F)) ∧
(∀g f F.
arm.FPSCR_FZ_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_FZ_fupd f F)) ∧
(∀g f F.
arm.FPSCR_FZ_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_FZ_fupd f F)) ∧
(∀g f F.
arm.FPSCR_FZ_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_FZ_fupd f F)) ∧
(∀g f F.
arm.FPSCR_FZ_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_FZ_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IDC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IDE_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_IDE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOC_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_IOC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IOE_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_IOE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXC_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_IXC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_IXE_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_IXE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_N_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_N_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFC_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_OFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_OFE_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_OFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_QC_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_QC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_RMode_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_RMode_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFC_fupd f (arm.FPSCR_RMode_fupd g F) =
arm.FPSCR_RMode_fupd g (arm.FPSCR_UFC_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_RMode_fupd g F) =
arm.FPSCR_RMode_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_UFE_fupd f (arm.FPSCR_UFC_fupd g F) =
arm.FPSCR_UFC_fupd g (arm.FPSCR_UFE_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_RMode_fupd g F) =
arm.FPSCR_RMode_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_UFC_fupd g F) =
arm.FPSCR_UFC_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_V_fupd f (arm.FPSCR_UFE_fupd g F) =
arm.FPSCR_UFE_fupd g (arm.FPSCR_V_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_RMode_fupd g F) =
arm.FPSCR_RMode_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_UFC_fupd g F) =
arm.FPSCR_UFC_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_UFE_fupd g F) =
arm.FPSCR_UFE_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_Z_fupd f (arm.FPSCR_V_fupd g F) =
arm.FPSCR_V_fupd g (arm.FPSCR_Z_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_AHP_fupd g F) =
arm.FPSCR_AHP_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_C_fupd g F) =
arm.FPSCR_C_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_DN_fupd g F) =
arm.FPSCR_DN_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_DZC_fupd g F) =
arm.FPSCR_DZC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_DZE_fupd g F) =
arm.FPSCR_DZE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_FZ_fupd g F) =
arm.FPSCR_FZ_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IDC_fupd g F) =
arm.FPSCR_IDC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IDE_fupd g F) =
arm.FPSCR_IDE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IOC_fupd g F) =
arm.FPSCR_IOC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IOE_fupd g F) =
arm.FPSCR_IOE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IXC_fupd g F) =
arm.FPSCR_IXC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_IXE_fupd g F) =
arm.FPSCR_IXE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_N_fupd g F) =
arm.FPSCR_N_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_OFC_fupd g F) =
arm.FPSCR_OFC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_OFE_fupd g F) =
arm.FPSCR_OFE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_QC_fupd g F) =
arm.FPSCR_QC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_RMode_fupd g F) =
arm.FPSCR_RMode_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_UFC_fupd g F) =
arm.FPSCR_UFC_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_UFE_fupd g F) =
arm.FPSCR_UFE_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
(∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_V_fupd g F) =
arm.FPSCR_V_fupd g (arm.FPSCR_fpscr'rst_fupd f F)) ∧
∀g f F.
arm.FPSCR_fpscr'rst_fupd f (arm.FPSCR_Z_fupd g F) =
arm.FPSCR_Z_fupd g (arm.FPSCR_fpscr'rst_fupd f F)
⊦ (∀f a.
arm.arm_state_Architecture (arm.arm_state_CP14_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_CP15_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_FP_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_MEM_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_REG_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_exception_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_undefined_fupd f a) =
arm.arm_state_Architecture a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_CP15_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_FP_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_MEM_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_REG_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_exception_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_undefined_fupd f a) =
arm.arm_state_CP14 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_CP14_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_FP_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_MEM_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_REG_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_exception_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_undefined_fupd f a) =
arm.arm_state_CP15 a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_CP14_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_CP15_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_FP_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_MEM_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_REG_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_exception_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_undefined_fupd f a) =
arm.arm_state_CPSR a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_CP14_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_CP15_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_FP_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_MEM_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_REG_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_exception_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_CurrentCondition (arm.arm_state_undefined_fupd f a) =
arm.arm_state_CurrentCondition a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_CP14_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_CP15_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_FP_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_MEM_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_REG_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_exception_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_undefined_fupd f a) =
arm.arm_state_ELR_hyp a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_CP14_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_CP15_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_FP_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_MEM_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_REG_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_exception_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_undefined_fupd f a) =
arm.arm_state_Encoding a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_CP14_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_CP15_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_FP_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_MEM_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_REG_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_exception_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_undefined_fupd f a) =
arm.arm_state_Extensions a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_CP14_fupd f a) = arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_CP15_fupd f a) = arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_CPSR_fupd f a) = arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_MEM_fupd f a) = arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_REG_fupd f a) = arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_exception_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_undefined_fupd f a) =
arm.arm_state_FP a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_CP14_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_CP15_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_FP_fupd f a) = arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_REG_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_exception_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_undefined_fupd f a) =
arm.arm_state_MEM a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_CP14_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_CP15_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_FP_fupd f a) = arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_MEM_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_exception_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_undefined_fupd f a) =
arm.arm_state_REG a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_abt a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_fiq a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_hyp a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_irq a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_mon a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_svc a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_CP14_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_CP15_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_FP_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_MEM_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_REG_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_exception_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_undefined_fupd f a) =
arm.arm_state_SPSR_und a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_CP14_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_CP15_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_FP_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_MEM_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_REG_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_exception_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_undefined_fupd f a) =
arm.arm_state_VFPExtension a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_Architecture_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_CP14_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_CP15_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_CPSR_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_CurrentCondition_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_ELR_hyp_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_Encoding_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_Extensions_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_FP_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_MEM_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_REG_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_abt_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_fiq_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_hyp_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_irq_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_mon_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_svc_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_SPSR_und_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_VFPExtension_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_undefined_fupd f a) =
arm.arm_state_exception a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_Architecture_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_CP14_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_CP15_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_CPSR_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_CurrentCondition_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_ELR_hyp_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_Encoding_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_Extensions_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_FP_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_MEM_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_REG_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_abt_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_fiq_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_hyp_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_irq_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_mon_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_svc_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_SPSR_und_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_VFPExtension_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_undefined (arm.arm_state_exception_fupd f a) ⇔
arm.arm_state_undefined a) ∧
(∀f a.
arm.arm_state_Architecture (arm.arm_state_Architecture_fupd f a) =
f (arm.arm_state_Architecture a)) ∧
(∀f a.
arm.arm_state_CP14 (arm.arm_state_CP14_fupd f a) =
f (arm.arm_state_CP14 a)) ∧
(∀f a.
arm.arm_state_CP15 (arm.arm_state_CP15_fupd f a) =
f (arm.arm_state_CP15 a)) ∧
(∀f a.
arm.arm_state_CPSR (arm.arm_state_CPSR_fupd f a) =
f (arm.arm_state_CPSR a)) ∧
(∀f a.
arm.arm_state_CurrentCondition
(arm.arm_state_CurrentCondition_fupd f a) =
f (arm.arm_state_CurrentCondition a)) ∧
(∀f a.
arm.arm_state_ELR_hyp (arm.arm_state_ELR_hyp_fupd f a) =
f (arm.arm_state_ELR_hyp a)) ∧
(∀f a.
arm.arm_state_Encoding (arm.arm_state_Encoding_fupd f a) =
f (arm.arm_state_Encoding a)) ∧
(∀f a.
arm.arm_state_Extensions (arm.arm_state_Extensions_fupd f a) =
f (arm.arm_state_Extensions a)) ∧
(∀f a.
arm.arm_state_FP (arm.arm_state_FP_fupd f a) =
f (arm.arm_state_FP a)) ∧
(∀f a.
arm.arm_state_MEM (arm.arm_state_MEM_fupd f a) =
f (arm.arm_state_MEM a)) ∧
(∀f a.
arm.arm_state_REG (arm.arm_state_REG_fupd f a) =
f (arm.arm_state_REG a)) ∧
(∀f a.
arm.arm_state_SPSR_abt (arm.arm_state_SPSR_abt_fupd f a) =
f (arm.arm_state_SPSR_abt a)) ∧
(∀f a.
arm.arm_state_SPSR_fiq (arm.arm_state_SPSR_fiq_fupd f a) =
f (arm.arm_state_SPSR_fiq a)) ∧
(∀f a.
arm.arm_state_SPSR_hyp (arm.arm_state_SPSR_hyp_fupd f a) =
f (arm.arm_state_SPSR_hyp a)) ∧
(∀f a.
arm.arm_state_SPSR_irq (arm.arm_state_SPSR_irq_fupd f a) =
f (arm.arm_state_SPSR_irq a)) ∧
(∀f a.
arm.arm_state_SPSR_mon (arm.arm_state_SPSR_mon_fupd f a) =
f (arm.arm_state_SPSR_mon a)) ∧
(∀f a.
arm.arm_state_SPSR_svc (arm.arm_state_SPSR_svc_fupd f a) =
f (arm.arm_state_SPSR_svc a)) ∧
(∀f a.
arm.arm_state_SPSR_und (arm.arm_state_SPSR_und_fupd f a) =
f (arm.arm_state_SPSR_und a)) ∧
(∀f a.
arm.arm_state_VFPExtension (arm.arm_state_VFPExtension_fupd f a) =
f (arm.arm_state_VFPExtension a)) ∧
(∀f a.
arm.arm_state_exception (arm.arm_state_exception_fupd f a) =
f (arm.arm_state_exception a)) ∧
∀f a.
arm.arm_state_undefined (arm.arm_state_undefined_fupd f a) ⇔
f (arm.arm_state_undefined a)
⊦ (∀f F. arm.FPSCR_AHP (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_AHP F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_C F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_DN F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_DZC F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_DZE F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_FZ F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IDC F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IDE F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IOC F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IOE F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IXC F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_IXE F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_N F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_OFC F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_OFE F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_QC F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_AHP_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_C_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_DN_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_DZC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_DZE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_FZ_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IDC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IDE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IOC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IOE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IXC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_IXE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_N_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_OFC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_OFE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_QC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_UFC_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_UFE_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_V_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_RMode (arm.FPSCR_Z_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F.
arm.FPSCR_RMode (arm.FPSCR_fpscr'rst_fupd f F) = arm.FPSCR_RMode F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_UFC F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_UFE F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_Z_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_V F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_AHP_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_C_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_DN_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_DZC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_DZE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_FZ_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IDC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IDE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IOC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IOE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IXC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_IXE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_N_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_OFC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_OFE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_QC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_RMode_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_UFC_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_UFE_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_V_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_fpscr'rst_fupd f F) ⇔ arm.FPSCR_Z F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_AHP_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_C_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_DN_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_DZC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_DZE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_FZ_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IDC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IDE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IOC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IOE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IXC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_IXE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_N_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_OFC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_OFE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_QC_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_RMode_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_UFC_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_UFE_fupd f F) =
arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_V_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_Z_fupd f F) = arm.FPSCR_fpscr'rst F) ∧
(∀f F. arm.FPSCR_AHP (arm.FPSCR_AHP_fupd f F) ⇔ f (arm.FPSCR_AHP F)) ∧
(∀f F. arm.FPSCR_C (arm.FPSCR_C_fupd f F) ⇔ f (arm.FPSCR_C F)) ∧
(∀f F. arm.FPSCR_DN (arm.FPSCR_DN_fupd f F) ⇔ f (arm.FPSCR_DN F)) ∧
(∀f F. arm.FPSCR_DZC (arm.FPSCR_DZC_fupd f F) ⇔ f (arm.FPSCR_DZC F)) ∧
(∀f F. arm.FPSCR_DZE (arm.FPSCR_DZE_fupd f F) ⇔ f (arm.FPSCR_DZE F)) ∧
(∀f F. arm.FPSCR_FZ (arm.FPSCR_FZ_fupd f F) ⇔ f (arm.FPSCR_FZ F)) ∧
(∀f F. arm.FPSCR_IDC (arm.FPSCR_IDC_fupd f F) ⇔ f (arm.FPSCR_IDC F)) ∧
(∀f F. arm.FPSCR_IDE (arm.FPSCR_IDE_fupd f F) ⇔ f (arm.FPSCR_IDE F)) ∧
(∀f F. arm.FPSCR_IOC (arm.FPSCR_IOC_fupd f F) ⇔ f (arm.FPSCR_IOC F)) ∧
(∀f F. arm.FPSCR_IOE (arm.FPSCR_IOE_fupd f F) ⇔ f (arm.FPSCR_IOE F)) ∧
(∀f F. arm.FPSCR_IXC (arm.FPSCR_IXC_fupd f F) ⇔ f (arm.FPSCR_IXC F)) ∧
(∀f F. arm.FPSCR_IXE (arm.FPSCR_IXE_fupd f F) ⇔ f (arm.FPSCR_IXE F)) ∧
(∀f F. arm.FPSCR_N (arm.FPSCR_N_fupd f F) ⇔ f (arm.FPSCR_N F)) ∧
(∀f F. arm.FPSCR_OFC (arm.FPSCR_OFC_fupd f F) ⇔ f (arm.FPSCR_OFC F)) ∧
(∀f F. arm.FPSCR_OFE (arm.FPSCR_OFE_fupd f F) ⇔ f (arm.FPSCR_OFE F)) ∧
(∀f F. arm.FPSCR_QC (arm.FPSCR_QC_fupd f F) ⇔ f (arm.FPSCR_QC F)) ∧
(∀f F.
arm.FPSCR_RMode (arm.FPSCR_RMode_fupd f F) = f (arm.FPSCR_RMode F)) ∧
(∀f F. arm.FPSCR_UFC (arm.FPSCR_UFC_fupd f F) ⇔ f (arm.FPSCR_UFC F)) ∧
(∀f F. arm.FPSCR_UFE (arm.FPSCR_UFE_fupd f F) ⇔ f (arm.FPSCR_UFE F)) ∧
(∀f F. arm.FPSCR_V (arm.FPSCR_V_fupd f F) ⇔ f (arm.FPSCR_V F)) ∧
(∀f F. arm.FPSCR_Z (arm.FPSCR_Z_fupd f F) ⇔ f (arm.FPSCR_Z F)) ∧
∀f F.
arm.FPSCR_fpscr'rst (arm.FPSCR_fpscr'rst_fupd f F) =
f (arm.FPSCR_fpscr'rst F)